Control device with flag registers for synchronization of communications between cores
AssigneeST-Ericsson SA
InventorsFrancois Chancel, Patrick Fulcheri
Life of this patent
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AssigneeST-Ericsson SA
InventorsFrancois Chancel, Patrick Fulcheri
Estimating the term…
A control device (D) is a part of an integrated circuit (IC) comprising at least two cores (C1, C2) coupled, via buses (BC1, BC2), to a memory (M) arranged to store data to be transferred between these cores (C1, C2). This control device (D) comprises at least one flag register (FR1, FR2) coupled to the cores (C1, C2) via the buses (BC1, BC2) and arranged to store, at Ni addresses, Ni flag values associated to data stored into the memory (M) by one of the cores and ready to be transferred towards the other core, each flag value stored at a first address being able to be set or reset by one of the cores (C1, C2) by means of a command designating the first address, thus authorizing another flag value stored at a second address to be simultaneously set or reset by the other core (C2, C1) by means of a command designating the second address.
Control device for an integrated circuit comprising at least two cores coupled, via buses, to a memory arranged to store data to be transferred between said cores, characterized in that it comprises at least one flag register coupled to said cores via said buses and arranged to store, at Ni addresses, Ni flag values associated to data stored into said memory by one of said cores and ready to be transferred towards the other one of said cores, each flag value stored at a first address being able to be set or reset by one of said cores a command designating said first address, thus authorizing another flag value stored at a second address to be simultaneously set or reset by the other core a command designating said second address.
Dependencies are inferred from the claim text.