System and method for dual-ported flash memory

A system, comprising:

• an Inter-integrated Circuit slave device comprising a flash memory array, a first Inter-integrated Circuit port, and a second Inter-integrated Circuit port;
• wherein the slave device is configured to receive hardware interrupts and software interrupts;
• wherein the flash memory array is configured to couple to an Inter-integrated Circuit bus;
• wherein the first Inter-integrated Circuit port couples to the flash memory array, the first port comprising a first pair of Inter-integrated Circuit wires and a hardware Inter-integrated Circuit engine coupled to the first pair of Inter-integrated Circuit wires and configured to respond to received hardware interrupts in a first addressing protocol;
• wherein the second Inter-integrated Circuit port couples to the flash memory array, the second port comprising a second pair of Inter-integrated Circuit wires and a software Inter-integrated Circuit engine coupled to the second pair of wires and configured to respond to received software interrupts in a second addressing protocol, differing from the first addressing protocol;
• and
• wherein the first Inter-integrated Circuit port interfaces with the flash memory array as a single array;
• wherein the second Inter-integrated Circuit port interfaces with the flash memory array as two independent arrays;
• and
• wherein the first Inter-integrated Circuit port and the second Inter-integrated Circuit port are accessible to the Inter-integrated Circuit bus.

An apparatus comprising a computer program product for emulating a dual-port Inter-integrated Circuit slave device, the computer program product having a tangible computer-readable storage medium with a computer program embodied thereon, the computer program comprising:

• computer code for monitoring, by an Inter-integrated Circuit slave device, a bus for Inter-integrated Circuit traffic;
• computer code for receiving, by the slave device, an Inter-integrated Circuit interrupt on the bus;
• computer code for determining, by the slave device, whether the received Inter-integrated Circuit interrupt is one of either a hardware interrupt or a software interrupt;
• wherein the slave device is configured to receive hardware interrupts and software interrupts;
• computer code for, in the event the received Inter-integrated Circuit interrupt is a hardware interrupt, responding, by the slave device, to the hardware interrupt, and accessing a flash memory for read/write operation based on the hardware interrupt;
• and
• computer code for, in the event the received Inter-integrated Circuit interrupt is a software interrupt responding, by the slave device, to the software interrupt, and accessing a flash memory for read/write operation based on the software interrupt;
• wherein responding to the hardware interrupt comprises responding in a first addressing mode and wherein responding to the software interrupt comprises responding in a second addressing mode, wherein the second addressing mode is different from the first addressing mode.