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US 7,890,560 B2Granted
Random number generating circuit, semiconductor integrated circuit, IC card and information terminal device
AssigneeKabushiki Kaisha Toshiba
InventorsShinichi Yasuda, Shinobu Fujita
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Abstract
A random number generating circuit receives as input a first digital random number signal generated at a first generating rate and produces as output a second digital random number signal having a second generating rate that is twice as high as the first generating rate. A semiconductor integrated circuit, an IC card and an information terminal device comprising the random number circuit is provided.
Claims12
A random number generating circuit, comprising:
- an input that receives a first digital random number signal generated at a first generating rate;
- a continuous signal processing unit to process the first digital random number signal so that any of its high and low levels do not repeat more than or equal to a predetermined number of times;
- a high-rate signal introducing unit to introduce a signal component corresponding to a second generating rate that is twice as high as the first generating rate into the first digital random number signal;
- a smoothing unit to control a frequency of occurrence for the high and low levels in a data sequence of the first digital random number signal;
- and
- an output to thereby output the second digital random number signal having a second generating rate, the second digital random number signal generated by outputs from the continuous signal processing unit, the high-rate signal introducing unit, and the smoothing unit,
- wherein the high-rate signal introducing unit introduces the signal component corresponding to the second generating rate by detecting a rising and falling edge of the levels in the first digital random number signal generated at the first generating rate by using a clock having a frequency that is twice as high as a frequency of a clock used to generate the first digital random number signal at the first generating rate.
4 more elements
A semiconductor integrated circuit, comprising:
- a random number generating circuit that receives as an input a first digital random number signal generated at a first generating rate,
- wherein the random number generating circuit includes:
- a continuous signal processing unit to process the first digital random number signal so that any of its high and low levels do not repeat more than or equal to a predetermined number of times;
- a high-rate signal introducing unit to introduce a signal component corresponding to a second generating rate that is twice as high as the first generating rate into the first digital random number signal;
- a smoothing unit to control a frequency of occurrence for the high and low levels in a data sequence of the first digital random number signal;
- and
- an output to thereby output a second digital random number signal having the second generating rate, the second digital random number signal generated by outputs from the continuous signal processing unit, the high-rate signal introducing unit, and the smoothing unit,
- wherein the high-rate signal introducing unit introduces the signal component corresponding to the second generating rate by detecting a rising and falling edge of the levels in the first digital random number signal generated at the first generating rate by using a clock having a frequency that is twice as high as a frequency of a clock used to generate the first digital random number signal at the first generating rate.
5 more elements
An IC card, comprising:
- a semiconductor integrated circuit including a random number generating circuit that receives as an input a first digital random number signal generated at a first generating rate,
- wherein the random number generating circuit includes:
- a continuous signal processing unit to process the first digital random number signal so that any of its high and low levels do not repeat more than or equal to a predetermined number of times;
- a high-rate signal introducing unit to introduce a signal component corresponding to a second generating rate that is twice as high as the first generating rate into the first digital random number signal;
- a smoothing unit to control a frequency of occurrence for the high and low levels in a data sequence of the first digital random number signal;
- and
- an output to thereby output a second digital random number signal having the second generating rate, the second digital random number signal generated by outputs from the continuous signal processing unit, the high-rate signal introducing unit, and the smoothing unit,
- wherein the high-rate signal introducing unit introduces the signal component corresponding to the second generating rate by detecting a rising and falling edge of the levels in the first digital random number signal generated at the first generating rate by using a clock having a frequency that is twice as high as a frequency of a clock used to generate the first digital random number signal at the first generating rate.
5 more elements
An information terminal device, comprising:
- a semiconductor integrated circuit including a random number generating circuit that receives as an input a first digital random number signal generated at a first generating rate,
- wherein the random number generating circuit includes:
- a continuous signal processing unit to process the first digital random number signal so that any of its high and low levels do not repeat more than or equal to a predetermined number of times;
- a high-rate signal introducing unit to introduce a signal component corresponding to a second generating rate that is twice as high as the first generating rate into the first digital random number signal;
- a smoothing unit to control a frequency of occurrence for the high and low levels in a data sequence of the first digital random number signal;
- and
- an output to thereby output a second digital random number signal having the second generating rate, the second digital random number signal generated by outputs from the continuous signal processing unit, the high-rate signal introducing unit, and the smoothing unit,
- wherein the high-rate signal introducing unit introduces the signal component corresponding to the second generating rate by detecting a rising and falling edge of the levels in the first digital random number signal generated at the first generating rate by using a clock having a frequency that is twice as high as a frequency of a clock used to generate the first digital random number signal at the first generating rate.
5 more elements
Dependencies are inferred from the claim text.