Wiring forming system and wiring forming method for forming wiring on wiring board

A wiring forming system for forming wiring on a wiring board, comprising:

• a maskless exposure unit which directly exposes an unexposed board by using exposure data generated based on design data relating to said wiring board, said design data comprising predetermined wiring information for a unit wiring board to be formed in said wiring board and predetermined pad layout information for an electronic component to be mounted or formed on said unit wiring board wherein said maskless exposure unit comprises:
• a scaling correction value generating unit which measures shrinkage/expansion of said developed board relative to said unexposed board and generates a scaling correction value correcting the position and shape of said exposure data based on said measured shrinkage/expansion,
• a misalignment data generating unit which measures a displacement between a reference position on an exposure stage at which said unexposed board should normally be placed for exposure and a position on said exposure board at which said unexposed board is actually placed, and which generates misalignment data based on said measured displacement, and
• a plurality of exposure heads which are arranged so as to expose, respectively designated areas on a surface of said unexposed board, and which perform parallel exposure;
• a post-development inspect unit which tests said board after development, by using said exposure data and image data of said board exposed and developed by said maskless exposure unit;
• an etching unit which etches said developed board;
• a post-etching inspect unit which tests an etching pattern formed on said etched board, by using etching inspect data generated based on said design data and image data of said board etched by said etching unit;
• a resizing rule generating unit which, based on said design data and the image data of said board etched by said etching unit, estimates optimum design data for obtaining said etched board with a desired result, and generates a resizing rule that indicates how said design data currently used should be corrected to obtain said optimum design data;
• a dynamic routing rules data generating unit which, based on said design data and a position on said etched board at which said electronic component is to be mounted or formed on said unit wiring board, generates dynamic routing rules data that indicates how said wiring should be changed to achieve a desired interconnection pattern;
• an input data base which stores resized design data generated by correcting said design data in accordance with said resizing rule, said input data base stores said data by dividing each kind of data so as to allocate the data to said respective exposure heads;
• and
• a raster image processor which is provided for each of said exposure heads, and which drives said exposure head by taking as an input said each kind of data allocated to said exposure head,
• wherein, using at least one of said scaling correction value, said dynamic routing rules data, and said misalignment data, said raster image processor distorts graphic data of said resized design data, dislocates the position of said graphic data, and thereby generates said exposure data allocated to said designated area on the surface of said unexposed board.