Method and apparatus for controlling sampling of signals produced in relation to stored data
AssigneesSamsung Electronics Co., Ltd., Regents of the University of Minnesota
InventorsJaekyun Moon, Jaewook Lee
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Abstract
An estimated current phase error is used to control the oscillation frequency of a voltage controlled oscillator used to control the timing of sampling operations performed by an analog to digital converter (ADC). The current phase error is calculated by a recursive computation using a previous phase error in order to eliminate noise effects from the current phase error.
Claims19
A method of calculating a current phase error between an equalized signal and an estimated data signal to control the timing of a sampling process in a system adapted to reproduce a signal transmitted through a communication channel by sampling, equalizing, and Viterbi decoding the signal, the method comprising:
- recursively applying a previous phase error to a calculation of the current phase error to eliminate effects of noise from the current phase error,
- wherein the current phase error is calculated by recursively applying the previous phase error to an integrated value based on previous outputs of a derivative channel, wherein the derivative channel has a channel characteristic computed by taking a derivative of a channel characteristic of the communication channel.
A signal reproducing apparatus, comprising:
- an analog-to-digital converter (ADC) adapted to sample a signal transmitted through a communication channel to produce a sampled signal;
- an equalizer adapted to equalize the sampled signal to produce an equalized signal;
- a data estimator adapted to estimate a value of the signal transmitted through the communication channel based on the equalized signal to produce an estimated signal;
- a phase estimator adapted to calculate a current phase error between the equalized signal and the estimated signal;
- and,
- a loop filter adapted to control an oscillation frequency of an oscillator adapted to generate a sampling clock for the ADC based on the current phase error calculated by the phase estimator;
- wherein the phase estimator calculates the current phase error based on a previous phase error and
- the phase estimator calculates the current phase error by recursively applying the previous phase error to an integrated value based on previous outputs of a derivative channel, wherein the derivative channel has a channel characteristic computed by taking a derivative of a channel characteristic of the communication channel.
A method of reproducing a signal transmitted through a communication channel, the method comprising:
- sampling the transmitted signal to produce a sampled signal;
- equalizing the sampled signal to produce an equalized signal;
- Viterbi decoding the equalized signal to produce an estimated data signal, wherein the Viterbi decoding comprises calculating branch metrics based on estimated phase errors of the equalized signal;
- calculating additional estimated phase errors based on the calculated branch metrics;
- calculating an estimated phase error used in a loop filter based on a phase estimate value corresponding to a survival path selected during the Viterbi decoding;
- and,
- controlling a sampling time used to sample the transmitted signal based on the estimated phase error used in the loop filter,
- wherein the number of states used in the Viterbi decoding is determined based on the length of the communication channel and the length of a derivative communication channel whose impulse response is computed by differentiating the impulse response of the communication channel.
A signal reproducing apparatus, comprising:
- an analog-to-digital converter (ADC) adapted to sample a signal transmitted through a communication channel to produce a sampled signal;
- an equalizer adapted to equalize the sampled signal to produce an equalized signal;
- a branch metric calculator & phase compensator (BMC) adapted to calculate branch metrics based on the equalized signal and corresponding estimated phase errors and to output the branch metrics and corresponding estimated phase values;
- an add compare selection & path memory (ACS & PM) adapted to compute path metrics based on the branch metrics and estimated phase values output by the BMC and to output an estimated data signal and a previous estimated phase error based on a survival path derived from the path metrics;
- a phase estimator adapted to calculate a current estimated phase error to be applied to the BMC based on the previous estimated phase error output by the ACS & PM;
- and,
- a loop filter adapted to control an oscillation frequency of an oscillator used to control the timing of the sampling performed by the ADC, wherein the loop filter controls the oscillation frequency based on the previous estimated phase error output by the ACS & PM.
Dependencies are inferred from the claim text.