Direct digital frequency synthesizer with phase error correction, method therefor, and receiver using same

A method comprising:

• storing digitized samples of a first portion of a sinusoidal waveform in a first memory;
• storing digitized samples of a second portion of said sinusoidal waveform in a second memory, wherein said first and second portions of said sinusoidal waveform together define a predetermined fraction of a whole cycle of said sinusoidal waveform wherein said predetermined fraction exhibits symmetry with respect to said whole cycle;
• storing extra digitized samples of said sinusoidal waveform beyond said first portion in a first extra memory;
• storing extra digitized samples of the sinusoidal waveform beyond said second portion in a second extra memory;
• concurrently outputting cosine and sine waveforms offset from a quadrature relationship with respect to each other by said phase offset from said digitized samples of said first and second memories and said first and second extra memories.

A receiver comprising:

• a direct digital frequency synthesizer having a first input for receiving a phase offset, a first output for providing a first local oscillator signal, and a second output for providing a second local oscillator signal offset from a quadrature relationship with said first local oscillator signal by said phase offset;
• a first mixer having a first input for receiving a radio frequency (RF) signal, a second input for receiving said first local oscillator signal, and an output for providing an in-phase signal at another frequency;
• and
• a second mixer having a first input for receiving said RF signal, a second input for receiving said second local oscillator signal, and an output for providing a quadrature signal at said other frequency a first memory for storing a plurality of—digitized samples of a first portion of a sinusoidal waveform;
• a second memory for storing a plurality of digitized samples of a second portion of said sinusoidal waveform, wherein said first and second portions of said sinusoidal waveform together define a predetermined fraction of a whole cycle of said sinusoidal waveform;
• a first extra memory for storing a plurality of extra digitized samples of said sinusoidal waveform beyond said first portion;
• a second extra memory for storing a plurality of extra digitized samples of said sinusoidal waveform beyond said second portion;
• and an access circuit responsive to said digitized samples from said first and second memories and to said digitized samples of said first and second extra memories for outputting said first and second local oscillator signals.