Circuit having gate oxide protection for low voltage fuse reads and high voltage fuse programming

A processor comprising:

• a fuse reader unit configured to, upon processor startup, read information to determine a processor operation configuration;
• and
• a plurality of fuse circuits coupled to provide the information to the fuse reader unit, wherein each of the plurality of electronic circuits includes:
• a data fuse coupled to a data node;
• a reference fuse coupled to a reference node;
• a programming circuit coupled to the data node, wherein the programming circuit is configured to, when activated, cause the data fuse to be programmed;
• a sensing circuit, wherein the sensing circuit is configured to, during a read operation, draw current from the data node and the reference node in order to develop a voltage differential between the data node and the reference node;
• a read circuit configured to, when activated, enable the sensing circuit to develop the voltage differential during the read operation;
• and
• a protection circuit having first and second resistors, wherein the protection circuit is configured to, during programming, couple the first and second resistors in series to form a voltage divider within the sensing circuit.