On-chip bias voltage temperature coefficient self-calibration mechanism

A non-volatile memory device formed on an integrated circuit, comprising:

• an array of non-volatile memory cells;
• and
• bias circuitry connected to receive a reference voltage and derive therefrom a supply a bias voltage for selective application the cells of the memory cell array to perform memory operations there upon, the bias circuitry comprising:
• a voltage determination circuit connected to receive the reference voltage and generate therefrom the bias voltage;
• a temperature sensing circuit;
• and
• a calibration circuit connected to receive the bias voltage and to receive a temperature indication from the temperature sensing circuit and determine from the bias voltage and temperature indication a compensation factor, wherein the compensation factor is supplied to the voltage determination circuit, which adjusts the bias voltage based upon the compensation factor.