Adjusting programming or erase voltage pulses in response to a rate of programming or erasing
AssigneeMicron Technology, Inc.
InventorDean Nobunaga
Life of this patent
Estimating the term…
Abstract
Memory devices and methods of operating memory devices are provided. In one such embodiment, a programming voltage pulse or an erase voltage pulse is applied to memory cells of a memory device. A rate at which programming or erasing is proceeding is determined. The programming voltage pulse or the erase voltage pulse is adjusted at least partially in response to the determined rate. The adjusted programming voltage pulse or the adjusted erase voltage pulse is applied to the memory cells that failed to program or erase.
Claims23
A method of operating a memory device, comprising:
- applying a programming voltage pulse or an erase voltage pulse to memory cells of the memory device;
- determining a rate at which programming or erasing is proceeding;
- adjusting the programming voltage pulse or the erase voltage pulse at least partially in response to the determined rate;
- and
- applying the adjusted programming voltage pulse or the adjusted erase voltage pulse to memory cells that failed to program or erase.
A memory device, comprising:
- a memory array;
- control logic coupled to the memory array;
- wherein the control logic is configured to program and/or erase the memory cells of the memory array;
- wherein the control logic is configured to determine a rate at which the program or erase is proceeding;
- wherein the control logic is configured to adjust a programming voltage pulse or an erase voltage pulse at least partially in response to the determined rate;
- and
- wherein the control logic is configured to apply the adjusted programming voltage pulse or the adjusted erase voltage pulse to memory cells that failed to program or erase.
A method of programming a memory device, comprising:
- applying a programming pulse to memory cells of the memory device during a programming operation;
- determining a rate at which programming is proceeding;
- adjusting at least one of a voltage level and a pulse width of the programming pulse at least partially in response to the determined rate;
- and
- applying the programming pulse with the adjusted voltage level and/or pulse width to memory cells that failed to program.
A method of erasing a memory device, comprising:
- applying an erase pulse to memory cells of the memory device during an erase operation;
- determining a rate at which erasing is proceeding;
- adjusting at least one of a voltage level and a pulse width of the erase pulse at least partially in response to the determined rate;
- and
- applying the erase pulse with the adjusted voltage level and/or pulse width to memory cells that failed to erase.
Dependencies are inferred from the claim text.