Memory and writing method thereof
AssigneeIndustrial Technology Research Institute
InventorsShyh-Shyuan Sheu, Lieh-Chiu Lin, Pei-Chia Chiang, Wen-Pin Lin
Life of this patent
Estimating the term…
Abstract
A memory having a memory cell, a resistance estimator and a write current generator. The resistance estimator is coupled to the memory cell to estimate the resistance of the memory cell and outputs an estimated resistance level. According to the estimated resistance level, the write current generator generates a write current to flow through the memory cell and to change the resistance of the memory cell. The write current is in a pulse form, and the write current generator sets the pulse width, or magnitude, or both the pulse width and the magnitude of the write current according to the estimated resistance level.
Claims17
A memory, comprising:
- a memory cell;
- a resistance estimator, estimating resistance of the memory cell and outputting an estimated resistance level;
- and
- a write current generator, generating a write current to flow through the memory cell, wherein the write current is in a pulse form and the write current generator sets pulse width of the write current according to the estimated resistance level.
A writing method for writing a memory, comprising:
- estimating resistance of a memory cell of the memory and outputting an estimated resistance level;
- setting pulse width, or both the pulse width and magnitude of a write current according to the estimated resistance level;
- and
- generating the write current to flow through the memory cell to change the resistance of the memory cell.
Dependencies are inferred from the claim text.