Bit line sense amplifier of semiconductor memory device having open bit line structure

A bit line sense amplifier of a semiconductor memory device with an open bit line structure, the bit line sense amplifier comprising a plurality of sense amplifier blocks to sense and to amplify a signal difference between a bit line and a complementary bit line,

• wherein each of the sense amplifier blocks comprises:
• PMOS and NMOS sense amplifier transistors to sense and to amplify the signal difference between the bit line and the complementary bit line;
• sense amplifier drivers to respectively apply a ground voltage to the NMOS sense amplifier transistors;
• column selection units to either connect the bit line to a local input/output line, which is connected to a data input/output pin, or to disconnect them from each other, in response to a signal transmitted via a column selection line;
• an equalizing unit to equalize a voltage of the bit line with a voltage of the complementary bit line, in response to a signal transmitted via a precharge/equalization signal line;
• and
• precharge units to precharge the voltages of the bit line and the complementary bit line, in response to a signal transmitted via the precharge/equalization signal line;
• wherein each of the column selection units, the sense amplifier drivers, the NMOS sense amplifier transistors, the PMOS sense amplifier transistors, and the precharge units are arranged to be respectively symmetrical about the equalization unit and the bit line and the complementary bit line.