Hard disk drive preamplifier timers and methods to calibrate hard disk drive preamplifier timers

A timer for use with a preamplifier circuit of a hard disk drive, the timer comprising:

• a comparator having first and second input terminals and an output terminal, wherein the first input terminal is coupled to receive a reference voltage signal;
• a current source adapted to be coupled between a first power source and the second input terminal;
• a compensation circuit in parallel with the current source and operative for varying an amount of current at the second input terminal;
• a transistor coupled to the second input terminal and a second power source, wherein an input signal either turns on or turns off the transistor;
• and
• a capacitor in parallel with the transistor,
• a second transistor to selectively store charge in a second capacitor based on a second input signal, the second capacitor receiving a third current and storing the charge to cause the second capacitor to have a voltage that increases at a second rate;
• a second trigger to output a signal when the voltage of the second capacitor exceeds the predetermined voltage;
• and
• a second compensation device to modify the third current to form a fourth current based on the second capacitor, the second compensation device causing the second rate to be substantially equal to a second predetermined rate, the second rate controlling a transition time between a first hard disk drive operating condition and a second hard disk drive operating condition different than the first operating condition,
• wherein the compensation circuit causes a time delay of the timer to substantially equal a predetermined value despite variations in the capacitor.

A timer for use with a preamplifier circuit of a hard disk drive, the timer comprising:

• a comparator having first and second input terminals and an output terminal, wherein the first input terminal is coupled to receive a reference voltage signal;
• a current source adapted to be coupled between a first power source and the second input terminal;
• a compensation circuit in parallel with the current source and operative for varying an amount of current at the second input terminal;
• a transistor coupled to the second input terminal and a second power source, wherein an input signal either turns on or turns off the transistor;
• and
• a capacitor in parallel with the transistor,
• a second transistor to selectively store charge in a second capacitor based on a second input signal, the second capacitor receiving a third current substantially equal to the second current and storing the charge to cause the second capacitor to have a voltage that increases at a second rate substantially equal to the predetermined rate;
• and
• a second comparator to output a signal when the voltage of the second capacitor exceeds the predetermined voltage,
• wherein the compensation circuit causes a time delay of the timer to substantially equal a predetermined value despite variations in the capacitor.