Direct memory accessing for fetching macroblocks

A system for retrieving a macroblock from a memory, said system comprising:

• a memory in which is stored a macroblock, wherein the memory includes a transport stream presentation buffer, wherein the memory receives an MPEG transport stream and buffers the MPEG transport stream in the transport stream presentation buffer, wherein a data transport processor is communicatively disposed between the memory and a video transport processor;
• the video decoder communicatively disposed between a display engine and the video transport processor, wherein the video decoder accesses a macroblock address table to determine a starting byte address and an ending byte address of a macroblock, wherein the macroblock address table comprises records, wherein each record comprises an identifier associated with the macroblock a first indicator indicating the starting byte address of the macroblock and a second indicator indicating the ending byte address of the macroblock wherein the video decoder determines the starting byte address and the ending byte address from the first indicator and the second indicator;
• and
• a memory controller operatively coupled to the memory;
• wherein the memory controller receives a read request from the video decoder that includes a starting byte address and an ending byte address, the starting byte address being indicative of a starting byte of the macroblock that is stored in the transport stream presentation buffer of the memory;
• the ending byte address being indicative of the ending byte of the macroblock in the transport stream presentation buffer;
• the starting byte address, the ending byte address and intermediate byte addresses therebetween being indicative of data bytes of the macroblock;
• the intermediate byte addresses being indicative of intermediate bytes of the macroblock between the starting byte and the ending byte;
• wherein the memory controller receives byte addresses from the video decoder, wherein the memory controller accesses the memory on a word-by-word basis, wherein each word comprises N bytes, wherein N is an integer greater than one and a power of two;
• wherein the memory controller determines a starting data word address and an ending data word address from the starting byte address and the ending byte address, the starting data word address being indicative of a starting data word that includes the starting byte of the macroblock and first bytes that are not part of the macroblock, the first bytes being disposed before the macroblock in the starting data word, the first bytes including first data that cause the video decoder to operate erroneously;
• the ending data word address being indicative of an ending data word that includes the ending byte of the macroblock and second bytes that are not part of the macroblock, the second bytes being disposed after the macroblock in the ending data word, the second bytes including second data that cause the video decoder to operate erroneously;
• the starting data word address, the ending data word address and intermediate data word addresses therebetween being indicative of data words of the macroblock, the intermediate data word addresses being indicative of intermediate data words of the macroblock between the starting data word and the ending data word;
• wherein the memory controller accesses the starting data word, the ending data word and the intermediate data words stored in the transport stream presentation buffer of the memory;
• wherein the memory controller overwrites the first bytes of the accessed starting data word, second bytes of the accessed ending data word with null information and none of the bytes of the accessed intermediate data words;
• and
• wherein the memory controller outputs, in data word units, the accessed starting data word with the first bytes overwritten by the null information, the accessed ending data word with the second bytes overwritten by the null information, and the accessed intermediate data words with no bytes overwritten by the memory controller.

A circuit for retrieving a macroblock from a memory, said circuit comprising:

• a memory in which is stored a macroblock, wherein the memory includes a transport stream presentation buffer, wherein the memory receives an MPEG transport stream and buffers the MPEG transport stream in the transport stream presentation buffer, wherein a data transport processor is communicatively disposed between the memory and a video transport processor;
• the video decoder communicatively disposed between a display engine and the video transport processor, wherein the video decoder accesses a macroblock address table to determine a starting byte address and an ending byte address of a macroblock, wherein the macroblock address table comprises records, wherein each record comprises an identifier associated with the macroblock a first indicator indicating the starting byte address of the macroblock and a second indicator indicating the ending byte address of the macroblock wherein the video decoder determines the starting byte address and the ending byte address from the first indicator and the second indicator;
• and
• a direct memory access (DMA) controller operatively coupled to the memory;
• wherein the DMA controller receives a read request from the video decoder that includes a starting byte address and an ending byte address, the starting byte address being indicative of a starting byte of the macroblock that is stored in the transport stream presentation buffer of the memory;
• the ending byte address being indicative of the ending byte of the macroblock in the transport stream presentation buffer;
• the starting byte address, the ending byte address and intermediate byte addresses therebetween being indicative of data bytes of the macroblock;
• the intermediate byte addresses being indicative of intermediate bytes of the macroblock between the starting byte and the ending byte;
• wherein the DMA controller receives byte addresses from the video decoder, wherein the DMA controller accesses the memory on a word-by-word basis, wherein each word comprises N bytes, wherein N is an integer greater than one;
• wherein the DMA controller determines a starting data word address and an ending data word address from the starting byte address and the ending byte address, the starting data word address being indicative of a starting data word that includes the starting byte of the macroblock and first bytes that are not part of the macroblock, the first bytes being disposed before the macroblock in the starting data word, the first bytes including first data that cause the video decoder to operate erroneously;
• the ending data word address being indicative of an ending data word that includes the ending byte of the macroblock and second bytes that are not part of the macroblock, the second bytes being disposed after the macroblock in the ending data word, the second bytes including second data that cause the video decoder to operate erroneously;
• the starting data word address, the ending data word address and intermediate data word addresses therebetween being indicative of data words of the macroblock, the intermediate data word addresses being indicative of intermediate data words of the macroblock between the starting data word and the ending data word;
• wherein the DMA controller accesses, in data word units, the starting data word, the ending data word and the intermediate data words stored in the transport stream presentation buffer of the memory;
• wherein the DMA controller overwrites the first bytes of the accessed starting data word, second bytes of the accessed ending data word with null information and none of the bytes of the accessed intermediate data words;
• and
• wherein the DMA controller outputs, in data word units, the accessed starting data word with the first bytes overwritten by the null information, the accessed ending data word with the second bytes overwritten by the null information, and the accessed intermediate data words with no bytes overwritten by the memory controller.