Processor architecture for executing wide transform slice instructions

A data processing system comprising:

• a processor on a single integrated circuit which includes:
• a first data path having a first bit width;
• a second data path having a second bit width greater than the first bit width;
• a plurality of third data paths having a combined bit width less than the second bit width;
• a first wide operand storage coupled to the first data path and to the second data path for storing a first wide operand received over the first data path, the first wide operand having a size with a number of bits greater than the first bit width;
• a second wide operand storage coupled to the first data path and to the second data path for storing a second wide operand received over the first data path, the second wide operand having a size with a number of bits greater than the first bit width;
• a register file including registers having the first bit width, the register file being connected to the first data path and the third data paths, and including storage for a first wide operand specifier which specifies an address of the first wide operand and a second wide operand specifier which specifies an address of the second wide operand;
• a functional unit capable of performing operations in response to instructions, the functional unit coupled by the second data path to the first wide operand storage and coupled by the third data paths to the register file;
• wherein the functional unit executes a wide transform slice instruction containing instruction fields specifying (i) a first wide operand register to cause retrieval of the first wide operand for storage in the first wide operand storage, (ii) a second wide operand register to cause retrieval of the second wide operand for storage in the second wide operand storage, (iii) at least one control operand register in the register file storing a control operand, and (iv) a results register in the register file, the wide transform slice instruction causing:
• the functional unit to (a) multiply the data from the first wide operand storage with the array of coefficients from the second wide operand storage to create products, (b) apply a transform to the products to create transformed products, and (c) place the transformed products in the first wide operand storage;
• a main memory external to the single integrated circuit;
• and
• a bus coupled to the main memory and to the processor.

A method of operating an apparatus including a first data path having a first bit width, a second data path having a second bit width greater than the first bit width, a plurality of third data paths having a combined bit width less than the second bit width, a first wide operand storage coupled to the first data path and to the second data path for storing a first wide operand received over the first data path, the first wide operand having a size with a number of bits greater than the first bit width, a second wide operand storage coupled to the first data path and to the second data path for storing a second wide operand received over the first data path, the second wide operand having a size with a number of bits greater than the first bit width, a register file including registers having the first bit width, the register file being connected to the first data path and the third data paths, and including first storage for a first wide operand specifier which specifies an address of the first wide operand, and including second storage for a second wide operand specifier which specifies an address of the second wide operand, and a functional unit capable of initiating instructions, the functional unit coupled by the second data path to the first wide operand storage and coupled by the third data paths to the register file, the method comprising:

• executing a wide transform slice instruction containing instruction fields specifying (i) a first wide operand register to cause retrieval of the first wide operand for storage in the first wide operand storage, (ii) a second wide operand register to cause retrieval of the second wide operand for storage in the second wide operand storage, (iii) at least one control register in the register file storing a control operand, and (iv) a results register in the register file, the wide transform slice instruction causing:
• the functional unit to (a) multiply the data from the first wide operand storage with the array of coefficients from the second wide operand storage to create products, (b) apply a transform to the products to create transformed products, and (c) place the transformed products in the first wide operand storage.

A non-transitory computer readable medium having computer readable code therein for causing a processor including a first data path having a first bit width, a second data path having a second bit width greater than the first bit width, a plurality of third data paths having a combined bit width less than the second bit width, a first wide operand storage coupled to the first data path and to the second data path for storing a first wide operand received over the first data path, the first wide operand having a size with a number of bits greater than the first bit width, a second wide operand storage coupled to the first data path and to the second data path for storing a second wide operand received over the first data path, the second wide operand having a size with a number of bits greater than the first bit width, a register file including registers having the first bit width, the register file being connected to the first data path and the third data paths, and including first storage for a first wide operand specifier which specifies an address of the first wide operand, and including second storage for a second wide operand specifier which specifies an address of the second wide operand, and a functional unit capable of initiating instructions, the functional unit coupled by the second data path to the first wide operand storage and coupled by the third data paths to the register file, to carry out a method comprising:

• executing a wide transform slice instruction containing instruction fields specifying (i) a first wide operand register to cause retrieval of the first wide operand for storage in the first wide operand storage, (ii) a second wide operand register to cause retrieval of the second wide operand for storage in the second wide operand storage, (iii) at least one control register in the register file storing a control operand, and (iv) a results register in the register file, the wide transform slice instruction causing:
• the functional unit to (a) multiply the data from the first wide operand storage with the array of coefficients from the second wide operand storage to create products, (b) apply a transform to the products to create transformed products, and (c) place the transformed products in the first wide operand storage.