Bias current generator for multiple supply voltage circuit

An apparatus that is coupled to a plurality of power sources and that provides a bias current, the apparatus comprising:

• a current source that generates a startup current;
• a first current minor that receives the startup current;
• a second current mirror that receives a reference current and that is coupled to the first current mirror at a difference node;
• a third current minor that is coupled to the difference node and that receives a difference current;
• and
• a fourth current mirror that receives the reference current and that is coupled to the third current minor at a summing node that adds the reference current to the difference between the startup current and the reference current if the startup current is greater than the reference current, wherein the bias current is output from the summing node;
• and
• a fault mode supply that is coupled to each power source and that generates a supply voltage for the second current minor.

An apparatus that provides a bias current, the apparatus comprising:

• a crude bias generator that generates a startup current and that is coupled to a first power source;
• a first current minor that receives the startup current;
• a second current mirror that receives a reference current and that is coupled to the first current mirror at a difference node;
• a third current minor that is coupled to the difference node and that receives a difference current;
• and
• a fourth current mirror that receives the reference current and that is coupled to the third current minor at a summing node that adds the reference current to the difference between the startup current and the reference current if the startup current is greater than the reference current, wherein the bias current is output from the summing node;
• and
• a fault mode supply that generates a supply voltage for the second current mirror, wherein the fault mode supply includes:
• a first diode that is coupled to the first power source;
• a first resistor that is coupled to the first power source;
• a first NMOS FET that is coupled to the diode at its drain and that is coupled to the resistor at its gate;
• a zener diode coupled between the gate of the FET and ground;
• a second resistor that is coupled to the source of the FET and that is coupled to the current selector;
• a second diode coupled to a second power source;
• and
• a second NMOS FET that is coupled to its power source at its gate, that is coupled to the second diode at its drain, and that is coupled to the second resistor at its source.