Switch controlling circuit, switch circuit utilizing the switch controlling circuit and methods thereof

A switch circuit, comprising:

• a first switch device;
• a second switch device;
• a frequency programmable clock signal generator, for generating a frequency controllable clock signal;
• a plurality of registers, comprising:
• a first stage register, for receiving an input signal and the frequency controllable clock signal, and for outputting a first output signal, which is utilized to control the first switch device, according to the input signal and the frequency controllable clock signal;
• and
• a second stage register, for receiving the first output signal and the frequency controllable clock signal, and for outputting a second output signal, which is utilized to control the second switch device, according to the first output signal and the frequency controllable clock signal;
• and
• a logic unit, for controlling the frequency programmable clock signal generator to generate the frequency controllable clock signal according to the input signal and the second output signal.

A switch controlling method, comprising:

• generating a frequency controllable clock signal;
• receiving an input signal and the frequency controllable clock signal to output a first output signal, which is utilized to control a first switch device, according to the input signal and the frequency controllable clock signal;
• receiving the first output signal and the frequency controllable clock signal to output a second output signal, which is utilized to control a second switch device, according to the first output signal and the frequency controllable clock signal;
• and
• controlling a frequency programmable clock signal generator to generate the frequency controllable clock signal according to the input signal and the second output signal.

A switch controlling circuit, comprising:

• a frequency programmable clock signal generator, for generating a frequency controllable clock signal;
• a plurality of registers, comprising:
• a first stage register, for receiving an input signal and the frequency controllable clock signal, and for outputting a first output signal, which is utilized to control a first switch device, according to the input signal and the frequency controllable clock signal;
• and
• a second stage register, for receiving the first output signal and the frequency controllable clock signal, and for outputting a second output signal, which is utilized to control a second switch device, according to the first output signal and the frequency controllable clock signal, wherein a first power terminal of the first switch device and a second power terminal of the second switch device are connected to a first voltage level and a first target terminal of the first switch device and a second target terminal of the second switch device are connected to a target circuit;
• and
• a third switch device, having a controlled terminal, for receiving the first output signal;
• and
• a fourth switch device, having another controlled terminal, for receiving the second output signal, wherein a third power terminal of the third switch device and a fourth power terminal of the fourth switch device are connected to a second voltage level and a third target terminal of the third switch device and a fourth target terminal of the fourth switch device are connected to the target circuit.