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US 7,888,967 B2Granted
Level translator circuit
AssigneeSTMicroelectronics S.r.l.
InventorSylvain Majcherczak
Life of this patent
Estimating the term…
Abstract
A voltage-level translator circuit including two pairs of branches in parallel, each pair including a low-impedance branch, where the low-impedance branches can be activated or deactivated. A possible application is the voltage level switching of data originating from an integrated circuit.
Claims21
A voltage-level translator circuit comprising:
- a first MOS transistor of a first type, having a gate configured to receive input data varying between a first voltage level and a second voltage level smaller than the first voltage level, the first MOS transistor having a source coupled to a first node and a drain coupled to a second node;
- a second MOS transistor of the first type, having a gate configured to receive an inverse of the input data, a source coupled to the first node, and a drain coupled to a third node;
- a third MOS transistor of a second type, having a gate coupled to the third node, a source coupled to a fourth node, and a drain coupled to the second node;
- a fourth MOS transistor of the second type, having a gate coupled to the second node, a source coupled to the fourth node, and a drain coupled to the third node the third node being configured to issue output data corresponding to the input data and the second node being configured to issue an inverse of the output data, the output data varying between a third voltage level and the second voltage level, the third voltage level being greater than the first voltage level;
- first and second branches between the second node and the fourth node, the second branch having a smaller impedance than the first branch;
- third and fourth branches between the third node and the fourth node, the fourth branch having a smaller impedance than the third branch;
- and
- a selection unit configured to activate the second branch and deactivate the fourth branch before the second node switches from the second voltage level to the third voltage level and configured to deactivate the second branch and activate the fourth branch before the second node switches from the third voltage level to the second voltage level.
5 more elements
A voltage translator circuit comprising:
- an input configured to receive an input signal of either a first voltage level or a second voltage level higher than the first voltage level;
- an inverted input configured to receive an inverse of the input signal;
- an output configured to supply an output signal corresponding to the input signal, the output signal being either the first voltage level or a third voltage level, the third voltage level being higher than the second voltage level;
- an inverted output configured to supply an inverse of the output signal;
- a first conduction path and a second conduction path between a high voltage supply node and the output, the first conduction path having a lower impedance than the second conduction path;
- a third conduction path and a fourth conduction path between the high voltage supply node and the inverted output, the third conduction path having a lower impedance than the fourth conduction path;
- and
- a selection circuit configured to both activate the first conduction path and to deactivate the third conduction path prior to the input switching from the second voltage level to the first voltage level, and to both deactivate the first conduction path and activate the third conduction path prior to the input switching from the first voltage level to the second voltage level.
5 more elements
A voltage translation, comprising:
- receiving an input signal of either a first voltage level or a second voltage level higher than the first voltage level:
- receiving an inverse of the input signal;
- supplying at a first output node an output signal corresponding to the input signal, the output signal being either the first voltage level or a third voltage level, the third voltage level being higher than the second voltage level:
- supplying at a second output node an inverse of the output signal;
- activating a first conduction path and deactivating a second conduction path prior to the input signal switching from the second voltage level to the first voltage level, the first conduction path being between a voltage supply node and the first output node, and the second conduction path being between the voltage supply node and the second output node:
- deactivating the first conduction path and activating the second conduction path prior to the input signal switching from the first voltage level to the second voltage level;
- detecting a change in voltage level at the first output node;
- and
- delaying the activating and deactivating steps until after a delay that is longer than a switching time in which the first output node changes a voltage level in response to a change in voltage level of the input signal.
6 more elements
Dependencies are inferred from the claim text.