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US 7,888,805 B2Granted
Semiconductor device package of stacked semiconductor chips with spacers provided therein
AssigneeRenesas Electronics Corporation
InventorKou Sasaki
Life of this patent
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Abstract
A semiconductor device package includes a plurality of stacked semiconductor chips and a spacer interposed therebetween. The spacer includes a first spacer and a second spacer stacked on one another. The first and the second spacers have different principal surfaces. If the second spacer has a larger principal surface than the first spacer, flexure of the upper semiconductor chip can be avoided.
Claims12
A semiconductor device package comprising:
- a first semiconductor chip;
- a first spacer placed above the first semiconductor chip;
- a second spacer placed above the first spacer;
- a second semiconductor chip placed above the second spacer;
- a first bonding layer interposed between the first semiconductor chip and the first spacer and bonding the first spacer to the first semiconductor chip;
- and
- a second bonding layer interposed between the second spacer and the second semiconductor chip and bonding the second semiconductor chip to the second spacer,
- wherein the second spacer has a larger principal surface than that of the first spacer.
5 more elements
A semiconductor device, comprising:
- a first semiconductor chip placed on a substrate;
- a first bonding layer placed on the first semiconductor chip;
- a first spacer placed on the first bonding layer, the first spacer having a smaller principal surface than that of the first semiconductor chip;
- a second spacer placed above the first spacer, the second spacer having a larger principal surface than that of the first spacer;
- a second bonding layer placed on the second spacer;
- and
- a second semiconductor chip placed on the second bonding layer.
4 more elements
Dependencies are inferred from the claim text.