Semiconductor package embedded in substrate, system including the same and associated methods

A device, comprising:

• a base substrate;
• a package including a die fixed to a package substrate, the package substrate electrically connected to the die, the die and the package substrate being encapsulated by an encapsulant in the package, the package at least partially embedded in the base substrate;
• and
• a wiring portion on the package and extending across at least a portion of the base substrate adjacent to the package, wherein:
• a wiring layer in the wiring portion is electrically connected to the package,
• the base substrate has a cavity therein that is at least as large as the encapsulated die and package substrate,
• the wiring portion further includes an insulating material disposed on the bottom surface of the package, the bottom surface facing away from the cavity, and
• the insulating material is disposed in the cavity in a space between the encapsulated die and package substrate and the sidewalls of the base substrate.