Structure and method to form source and drain regions over doped depletion regions

A semiconductor device comprising:

• a substrate with a first substrate region comprising first conductivity type dopants;
• a transistor in the first substrate region, the transistor comprises a gate disposed on a surface of the substrate in the first region,
• first and second source/drain regions adjacent to the gate, and
• a channel between the first and second source/drain regions beneath the gate;
• and
• first and second buried doped depletion regions disposed below the source/drain regions and not below the channel, the doped depletion regions are isolated from each other by a separation region below the channel of the transistor and from the first and second source/drain regions, the doped depletion regions reduce junction capacitance between source/drain regions and the substrate.

A semiconductor device comprising:

• a substrate includes a first substrate region comprising first conductivity type dopants;
• a transistor in the first substrate region, the transistor comprises
• a gate disposed on a surface of the substrate in the first region,
• first and second source/drain regions in the first region of the substrate adjacent to the gate, the first and second source/drain regions comprising second conductivity type dopants, and
• a channel between the first and second source/drain regions beneath the gate;
• and
• first and second doped depletion regions comprising the second conductivity type dopants in the first substrate region, the doped depletion regions are isolated from each other and disposed only below the source/drain regions and not below the channel.