US 7,888,735 B2 · Integrated complementary low voltage RF-LDMOS

Abstract

Complementary RF LDMOS transistors have gate electrodes over split gate oxides. A source spacer of a second conductivity type extends laterally from the source tap of a first conductivity type to approximately the edge of the gate electrode above the thinnest gate oxide. A body of a first conductivity type extends from approximately the bottom center of the source tap to the substrate surface and lies under most of the thin section of the split gate oxide. The source spacer is approximately the length of the gate sidewall oxide and is self aligned with gate electrode. The body is also self aligned with gate electrode. The drain is surrounded by at least one buffer region which is self aligned to the other edge of the gate electrode above the thickest gate oxide and extends to the below the drain and extends laterally under the thickest gate oxide. Both the source tap and drain are self aligned with the gate side wall oxides and are thereby spaced apart laterally from the gate electrode.

Claims26

Dependent claims

A lateral double diffused metal oxide semiconductor (LDMOS) transistor comprising:

a) a gate oxide having a plurality of thicknesses under a gate electrode having first and second opposite vertical edges with corresponding first and second sidewall oxides formed thereon;
b) a source tap region of a first conductivity type self aligned with said first sidewall oxide;
c) a lateral source spacer of a second conductivity type extending substantially between said first edge of said gate electrode and said source tap, said first conductivity type being opposite to said second conductivity type;
d) a drain region of said second conductivity type on an opposite side of said gate electrode;
and
e) at least one buffer region that at least partially surrounds said drain region and which extends under a second edge of said gate electrode.

3 more elements

A lateral double diffused metal oxide semiconductor (LDMOS) transistor comprising:

a) a gate oxide having a thinner section under a first edge of a gate electrode and a thicker section under a second edge of said gate electrode;
b) a lateral source spacer of a second conductivity type self aligned with said first edge of said gate electrode and extending to a first edge of a source silicide which is self aligned with a first sidewall oxide on said first edge of said gate electrode, said first edge of said source silicide closer to said first edge of said gate electrode than a second, opposite edge of said source silicide;
c) a source tap region of a first conductivity type, said first conductivity type being opposite to said second conductivity type, lying under, and in contact with, a portion of said source silicide and a portion of said lateral source spacer;
d) a drain region of said second conductivity type self aligned with a second sidewall oxide on said second edge of said gate electrode;
e) a first buffer region of said second conductivity type lying below said drain region and above a second buffer region of said second conductivity type, both of which at least partially surround said drain region and which extend under said second edge of said gate electrode, said drain region is of a higher dopant concentration than said first buffer region which, in turn, has a higher dopant concentration than said second buffer region;
f) a body of said first conductivity type which lies below at least a portion of said source tap region and under said lateral source spacer and extends to said gate oxide, said body being of a lower dopant concentration than said source tap region;
g) a well of said first conductivity type under a least a portion of said body;
h) a buried layer of said first conductivity type extending from said well towards a substrate;
and
i) a substrate laying below said gate electrode, said spacer, said source region, said drain region, said first and second buffer regions, said body, said well, and said buried layer;
and
j) an epi layer of said first conductivity type lying on said substrate.

9 more elements

Dependencies are inferred from the claim text.

Integrated complementary low voltage RF-LDMOS

Life of this patent

Integrated complementary low voltage RF-LDMOS

Life of this patent

Abstract

Claims26