Capacitors for semiconductor memory devices

A semiconductor memory device having capacitors, comprising:

• an elongated active region disposed in a semiconductor substrate, including first and second terminal end portions disposed at opposite ends of the active region and including a center between the first and second terminal end portions, the active region extending in a direction from the first terminal end portion to the second terminal end portion;
• a pair of first landing pads disposed respectively in the first and second terminal end portions of the active region and spaced apart along the direction;
• a second landing pad disposed on the center of the active region, wherein a height of the second landing pad is the same as a height of the pair of first landing pads;
• a pair of lower electrodes of two capacitors disposed respectively over the pair of first landing pads;
• and
• a pair of buried plugs disposed between the pair of first landing pads, and the pair of lower electrodes;
• wherein vertical centerlines of the pair of buried plugs are horizontally offset from vertical centerlines of the pair of first landing pads and the pair of buried plugs protrude from the pair of first landing pads along a direction parallel to a surface of the semiconductor substrate, and vertical centerlines of the pair of lower electrodes are horizontally offset from vertical centerlines of the pair of buried plugs and the pair of lower electrodes protrude from the pair of buried plugs along the direction parallel to the surface of the semiconductor substrate and wherein all horizontal cross sections of the pair of buried plugs incompletely intersect all horizontal cross sections of the pair of first landing pads along the directions when viewed from above and all horizontal cross sections of the pair of lower electrodes incompletely intersect all horizontal cross sections of the pair of buried plugs along the directions when viewed from above.

A semiconductor memory device having capacitors, comprising:

• an elongated active region disposed in a semiconductor substrate, including first and second terminal end portions disposed at opposite ends of the active region and including a center between the first and second terminal end portions;
• a pair of first landing pads disposed respectively in the first and second terminal end portions of the active region;
• a second landing pad disposed on the center of the active region, wherein an area of an upper surface of the second landing pad is smaller than that of each of upper surfaces of the pair of first landing pads;
• a pair of buried plugs disposed respectively on the pair of first landing pads, wherein the pair of buried plugs partially overlap the pair of first landing pads when viewed from above;
• and
• a pair of lower electrodes of two capacitors disposed respectively on the pair of buried plugs;
• wherein the pair of buried plugs protrude respectively toward opposite directions from each other with respect to the active region, one of the pair of lower electrodes completely overlaps a selected first landing pad when viewed from above and partially overlap a selected buried plug corresponding to the one lower electrode in the first terminal end portion of the active region when viewed from above, and the remaining lower electrode partially overlaps the remaining first landing pad and the remaining buried plug corresponding to the remaining lower electrode in the second terminal end portion of the active region when viewed from above and wherein all horizontal cross sections of the pair of buried plugs incompletely intersect all horizontal cross sections of the pair of first landing pads along the directions when viewed from above and all horizontal cross sections of the pair of lower electrodes incompletely intersect all horizontal cross sections of the pair of buried plugs along the directions when viewed from above.