Method of manufacturing semiconductor device having semiconductor formation regions of different planar sizes

A semiconductor device manufacturing method comprising:

• preparing, on one surface of a semiconductor wafer, a wafer process material, the wafer process material having a plurality of semiconductor formation regions comprising at least a first semiconductor formation region having a first planer size, and a second semiconductor formation region having a second planer size which is different from the first planer size, and the wafer process material including a low dielectric constant film/wiring line stack structure component in which a low dielectric constant film and a wiring line are stacked in each semiconductor formation region;
• selecting the first semiconductor formation region as a necessary semiconductor formation region from among the semiconductor formation regions, selecting, as an unnecessary semiconductor formation region, the second semiconductor formation region from among the semiconductor formation regions, in which a dicing street for the necessary semiconductor formation region traverses the second semiconductor formation region, and applying a laser beam to the predetermined width area including the dicing street for the necessary semiconductor formation region and onto a straight extension of the predetermined width area in the wafer process material in order to form a first groove around the dielectric constant film/wiring line stack structure component of the necessary semiconductor formation region and a second groove in an area corresponding to the straight extension within the unnecessary semiconductor formation region;
• forming a protective film in at least the second groove formed in the unnecessary semiconductor formation region and on the low dielectric constant film/wiring line stack structure component;
• forming, on the protective film in the necessary semiconductor formation region, an upper wiring line connected to the wiring line of the low dielectric constant film/wiring line stack structure component;
• forming a sealing film on the low dielectric constant film/wiring line stack structure component and on the upper wiring line within the necessary semiconductor formation region;
• and
• cutting at least one of the protective film and the sealing film, and the semiconductor wafer along the dicing street;
• wherein forming the protective film in the second groove formed within the unnecessary semiconductor formation region and on the low dielectric constant film/wiring line stack structure component includes forming the protective film in the first groove around the necessary semiconductor formation region and in the second groove within the unnecessary semiconductor formation region, and removing the protective film formed in the first groove within the necessary semiconductor formation region except in the second groove formed within the unnecessary semiconductor formation region to form other grooves.

A semiconductor device manufacturing method comprising:

• preparing, on one surface of a semiconductor wafer, a wafer process material, the wafer process material having a plurality of semiconductor formation regions comprising at least a first semiconductor formation region having a first planer size, and a second semiconductor formation region having a second planer size which is different from the first planer size, and the wafer process material including a low dielectric constant film/wiring line stack structure component in which a low dielectric constant film and a wiring line are stacked in each semiconductor formation region;
• selecting the first semiconductor formation region as a necessary semiconductor formation region from among the semiconductor formation regions, selecting, as an unnecessary semiconductor formation region, the second semiconductor formation region from among the semiconductor formation regions, in which a dicing street for the necessary semiconductor formation region traverses the second semiconductor formation region, and applying a laser beam to a predetermined width area including the dicing street for the necessary semiconductor formation region and onto a straight extension of the predetermined width area in the wafer process material in order to form a first groove around the dielectric constant film/wiring line stack structure component of the necessary semiconductor formation region and a second groove in an area corresponding to the straight extension within the unnecessary semiconductor formation region;
• forming a protective film in at least the second groove formed in the unnecessary semiconductor formation region and on the low dielectric constant film/wiring line stack structure component;
• forming, on the protective film in the necessary semiconductor formation region, an upper wiring line connected to the wiring line of the low dielectric constant film/wiring line stack structure component;
• forming a sealing film on the low dielectric constant film/wiring line stack structure component and on the upper wiring line within the necessary semiconductor formation region;
• and
• cutting at least one of the protective film and the sealing film, and the semiconductor wafer along the dicing street;
• wherein the predetermined width area in forming the first groove and the second groove includes the dicing street and has a width larger than the dicing street;
• wherein preparing the wafer process material comprises preparing a material in which a passivation film is formed on the low dielectric constant film/wiring line stack structure component;
• and
• wherein, before forming the first groove and the second groove, laser groove formation preliminary grooves of the predetermined width area in the passivation film are formed in the necessary semiconductor formation region except for the passivation film in the unnecessary semiconductor formation region.

A semiconductor device manufacturing method comprising:

• preparing, on one surface of a semiconductor wafer, a wafer process material, the wafer process material having a plurality of semiconductor formation regions comprising at least a first semiconductor formation region having a first planer size, and a second semiconductor formation region having a second planer size which is different from the first planer size, and the wafer process material including a low dielectric constant film/wiring line stack structure component in which a low dielectric constant film and a wiring line are stacked in each semiconductor formation region;
• selecting the first semiconductor formation region as a necessary semiconductor formation region from among the semiconductor formation regions, selecting, as an unnecessary semiconductor formation region, the second semiconductor formation region from among the semiconductor formation regions, in which a dicing street for the necessary semiconductor formation region traverses the second semiconductor formation region, and applying a laser beam to the predetermined width area including the dicing street for the necessary semiconductor formation region and onto a straight extension of the predetermined width area in the wafer process material in order to form a first groove around the dielectric constant film/wiring line stack structure component of the necessary semiconductor formation region and a second groove in an area corresponding to the straight extension within the unnecessary semiconductor formation region;
• forming a protective film in at least the second groove formed in the unnecessary semiconductor formation region and on the low dielectric constant film/wiring line stack structure component;
• forming, on the protective film in the necessary semiconductor formation region, an upper wiring line connected to the wiring line of the low dielectric constant film/wiring line stack structure component;
• forming a sealing film on the low dielectric constant film/wiring line stack structure component and on the upper wiring line within the necessary semiconductor formation region;
• and
• cutting at least one of the protective film and the sealing film, and the semiconductor wafer along the dicing street;
• wherein the predetermined width area in forming the first groove and the second groove includes the dicing street and has a width larger than the dicing street;
• and
• wherein forming the protective film in the second groove formed within the unnecessary semiconductor formation region and on the low dielectric constant film/wiring line stack structure component includes forming the protective film in the first groove within the necessary semiconductor formation region and in the second groove within the unnecessary semiconductor formation region, and removing the protective film formed in the first groove within the necessary semiconductor formation region except in the second groove formed within the unnecessary semiconductor formation region to form another groove.