Method of forming stressed SOI FET having doped glass box layer using sacrificial stressed layer

A method of fabricating a semiconductor-on-insulator (“SOI”) substrate, comprising:

• forming a SOI substrate including (i) an SOI layer of monocrystalline silicon separated from (ii) a bulk semiconductor layer by (iii) a buried oxide (“BOX”) layer including a layer of doped silicate glass by steps including depositing a doped silicate glass layer onto a first structure including a first semiconductor layer, bonding the doped silicate glass layer to a second structure including a second semiconductor layer and then removing a portion of one of the first and second semiconductor layers;
• then forming a first sacrificial stressed layer having one of a tensile stress or a compressive stress to overlie a first portion of the SOI layer while exposing a second portion of the SOI layer;
• forming a second sacrificial stressed layer having one of a tensile stress or a compressive stress other than that of the first sacrificial layer, such that the second sacrificial stressed layer contacts the first sacrificial stressed layer and the second portion of the SOI layer;
• then at least substantially removing the second sacrificial stressed layer from atop the first sacrificial stressed layer;
• then etching trenches through the first and second sacrificial stressed layers and into the SOI layer;
• then heating the SOI substrate with the first and second sacrificial stressed layers thereon sufficiently to cause the doped silicate glass layer to soften and the first and second sacrificial stressed layers to relax, to thereby apply a stress to the first and second portions of the SOI layer to form first and second stressed portions of the SOI layer, the step of heating causing one of the first and second portions of the SOI layer to become compressive stressed and the other of the first and second portions of the SOI layer to become tensile stressed;
• then filling the trenches in the stressed SOI layer with a dielectric material to form trench isolation regions contacting peripheral edges of the first and second stressed portions of the SOI layer, the trench isolation regions extending downwardly from a major surface of the SOI layer towards the BOX layer;
• after the filling of the trenches, removing the first and second sacrificial stressed layers to expose the first and second stressed portions of the SOI layer;
• and
• then forming transistors having active semiconductor regions disposed within the first and second stressed portions of the SOI layer, wherein the stress in the first and second stressed portions remains essentially fixed despite thermal processing required to form the transistors.