Insulated gate e-mode transistors
AssigneeTransphorm Inc.
InventorsChang Soo Suh, Ilan Ben-Yaacov, Robert Coffie, Umesh Mishra
Life of this patent
Estimating the term…
Abstract
Enhancement-mode III-nitride transistors are described that have a large source to drain barrier in the off state, low off state leakage, and low channel resistance in the access regions are described. The devices can include a charge depleting layer under the gate and/or a charge enhancing layer outside of the gate region, that is, in the access region.
Claims33
A III-nitride HEMT device, comprising:
- a gate electrode;
- a source electrode and a drain electrode;
- a series of III-nitride layers forming an N-face stack with an uppermost layer with which the source and drain electrodes form ohmic contacts;
- and
- a channel depleting portion between the gate electrode and the uppermost layer of the N-face stack, wherein the channel depleting portion does not extend all the way to the source electrode.
A III-nitride HEMT device, comprising:
- a gate electrode;
- a source electrode and a drain electrode;
- a series of III-nitride layers forming a Ga-face stack with an uppermost layer, and a channel layer with which the source and drain electrodes form ohmic contacts;
- a dielectric layer on the uppermost layer and over an access region of the device;
- a channel depleting portion between the gate electrode and the uppermost layer of the Ga-face stack, wherein the channel depleting portion does not extend all the way to the source electrode;
- and
- a charge enhancing III-nitride layer between the dielectric layer and the uppermost layer and surrounding the channel depleting portion.
A III-nitride HEMT device, comprising:
- a gate electrode;
- a source electrode and a drain electrode;
- a series of III-nitride layers forming a Ga-face stack with an uppermost layer and a channel layer with which the source and drain electrodes form ohmic contacts;
- a channel depleting portion between the gate electrode and the uppermost layer of the Ga-face stack, wherein the channel depleting portion does not extend all the way to the source electrode;
- a charge enhancing III-nitride layer over the uppermost layer of the Ga-face stack and surrounding the channel depleting portion;
- and
- a GaN layer between the charge enhancing III-nitride layer and the uppermost layer of the Ga-face stack.
A normally off III-nitride HEMT device, comprising:
- an upper gate electrode;
- a source electrode and a drain electrode;
- a series of III-nitride layers forming a Ga-face stack with an uppermost layer and a channel layer with which the source and drain electrodes form ohmic contacts, wherein the series of III-nitride layers includes a p-type III-nitride capping layer adjacent to a III-nitride type covering layer on an N-face of the series and an aperture in the covering layer exposes a portion of the p-type III-nitride capping layer;
- and
- a channel depleting portion either between the upper gate electrode and the uppermost layer of the Ga-face stack, wherein the channel depleting portion does not extend all the way to the source electrode.
A normally off III-nitride HEMT device, comprising:
- an upper gate electrode;
- a source electrode and a drain electrode;
- and
- a series of III-nitride layers forming a Ga-face stack with an uppermost layer and a channel layer with which the source and drain electrodes form ohmic contacts, wherein the series of III-nitride layers includes a lower III-nitride layer adjacent to a III-nitride type covering layer on an N-face of the series and an aperture in the covering layer exposes a portion of the lower III-nitride layer;
- and
- a channel depleting portion either between the upper gate electrode and the uppermost layer of the Ga-face stack, wherein the channel depleting portion does not extend all the way to the source electrode;
- wherein at least one of the uppermost layer in the gate region or the exposed portion of the lower III-nitride layer is treated with fluorine.
A normally off III-nitride HEMT device, comprising:
- a gate electrode;
- a source electrode and a drain electrode;
- a series of semi-polar or nonpolar III-nitride layers with an uppermost layer, and a channel layer with which the source and drain electrodes form ohmic contacts;
- and
- a channel depleting portion between the gate electrode and the uppermost layer of the N-face stack, wherein the channel depleting portion does not extend all the way to the source electrode.
Dependencies are inferred from the claim text.