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US 7,847,287 B2Granted
Inverter, logic circuit including an inverter and methods of fabricating the same
AssigneeSamsung Electronics Co., Ltd.
InventorsSang-wook Kim, Young-soo Park, Jae-chul Park
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Abstract
An inverter, a logic circuit including the inverter and method of fabricating the same are provided. The inverter includes a load transistor of a depletion mode, and a driving transistor of an enhancement mode, which is connected to the load transistor. The load transistor may have a first oxide layer as a first channel layer. The driving transistor may have a second oxide layer as a second channel layer.
Claims10
An inverter, comprising:
- a load transistor of a depletion mode, the load transistor having a first oxide layer as a first channel layer;
- and
- a driving transistor of an enhancement mode, the driving transistor being connected to the load transistor and having a second oxide layer as a second channel layer,
- wherein the driving transistor includes,
- a source electrode and a drain electrode both corresponding to the second oxide layer, and
- a barrier layer between the second oxide layer and the source electrode and the drain electrode, the barrier layer having a work function greater than that of the second oxide layer.
3 more elements
Dependencies are inferred from the claim text.