Non-volatile memory devices including stacked NAND-type resistive memory cell strings and methods of fabricating the same

A non-volatile memory device, comprising:

• a substrate;
• an insulating layer on the substrate;
• a plurality of serially connected resistive memory cells stacked in the insulating layer such that a first one of the plurality of resistive memory cells is on the substrate and a next one of the plurality of resistive memory cells is on the first one of the plurality of resistive memory cells to define a NAND-type resistive memory cell string;
• and
• a bit line on the insulating layer and electrically connected to a last one of the plurality of resistive memory cells,
• wherein at least one of the plurality of resistive memory cells comprises:
• a switching device including a body pattern comprising a source region, a channel region, and a drain region stacked in the insulating layer, and a gate electrode on a sidewall of the body pattern;
• a variable resistor spaced apart from the switching device;
• and
• an upper electrode on the variable resistor and the drain region of the switching device, and
• wherein the upper electrode of the first one of the plurality of resistive memory cells electrically connects the variable resistor and the drain region of the first one of the plurality of resistive memory cells with the variable resistor and the source region of the next one of the plurality of resistive memory cells in the NAND-type resistive memory cell string.

A method of fabricating a non-volatile memory device, the method comprising:

• forming an insulating layer on a substrate;
• forming a plurality of serially connected resistive memory cells stacked in the insulating layer such that a first one of the plurality of resistive memory cells is on the substrate and a next one of the plurality of resistive memory cells is on the first one of the plurality of resistive memory cells to define NAND-type resistive memory cell string;
• and
• forming a bit line on the insulating layer and electrically connected to a last one of the plurality of resistive memory cells,
• wherein forming at least one of the plurality of resistive memory cells comprises:
• forming an interlayer insulating layer on the substrate;
• forming a switching device in the interlayer insulating layer including a body pattern comprising a source region, a channel region, and a drain region stacked in the interlayer insulating layer;
• and
• forming a data storage element in the interlayer insulating later and electrically connected between the source region and the drain region of the switching device,
• wherein forming the switching device comprises:
• patterning the interlayer insulating layer to define an opening therein;
• forming the body pattern in the opening in the interlayer insulating layer;
• implanting impurity ions into the body pattern to define the source region, the channel region, and the drain region stacked in the opening in the interlayer insulating layer;
• and
• forming a gate electrode on a sidewall of the body pattern.

A method of fabricating a non-volatile memory device, the method comprising:

• forming an insulating layer on a substrate;
• forming a plurality of serially connected resistive memory cells stacked in the insulating layer such that a first one of the plurality of resistive memory cells is on the substrate and a next one of the plurality of resistive memory cells is on the first one of the plurality of resistive memory cells to define NAND-type resistive memory cell string;
• and
• forming a bit line on the insulating layer and electrically connected to a last one of the plurality of resistive memory cells,
• wherein forming at least one of the plurality of resistive memory cells comprises:
• forming an interlayer insulating layer on the substrate;
• forming a switching device in the interlayer insulating layer including a body pattern comprising a source region, a channel region, and a drain region stacked in the interlayer insulating layer;
• and
• forming a data storage element in the interlayer insulating later and electrically connected between the source region and the drain region of the switching device, wherein forming the data storage element comprises:
• forming an opening extending through the interlayer insulating layer;
• forming a lower electrode in the opening;
• forming a variable resistor on the lower electrode;
• and
• forming an upper electrode on the variable resistor,
• wherein the upper electrode of the first one of the plurality of resistive memory cells is on the lower electrode and the body pattern of the next one of the plurality of resistive memory cells in the NAND-type resistive memory cell string.

A method of fabricating a non-volatile memory device, the method comprising:

• forming an insulating layer on a substrate;
• forming a plurality of serially connected resistive memory cells stacked in the insulating layer such that a first one of the plurality of resistive memory cells is on the substrate and a next one of the plurality of resistive memory cells is on the first one of the plurality of resistive memory cells to define NAND-type resistive memory cell string;
• and
• forming a bit line on the insulating layer and electrically connected to a last one of the plurality of resistive memory cells,
• wherein forming at least one of the plurality of resistive memory cells comprises:
• forming an interlayer insulating layer on the substrate;
• forming a switching device in the interlayer insulating layer including a body pattern comprising a source region, re ion, a channel region, and a drain region stacked in the interlayer insulating layer;
• and
• forming a data storage element in the interlayer insulating later and electrically connected between the source region and the drain region of the switching device, wherein forming the data storage element comprises:
• forming a contact hole extending through the interlayer insulating layer;
• forming a variable resistor in the hole;
• and
• forming an upper electrode on the variable resistor and the body pattern.