Priority encoder
AssigneeAdvantest Corporation
InventorShoji Kojima
Life of this patent
Estimating the term…
Loading patent…
AssigneeAdvantest Corporation
InventorShoji Kojima
Estimating the term…
A priority encoder encodes an (N+1)-bit thermometer code, where N indicates a natural number. A plurality of selectors are arranged in a matrix of M rows and (N+1) columns, where M indicates a natural number, and select one of signals at first and second input terminals (1,0) in accordance with the value of a signal input to the control terminal. An output signal from the selector in the i-th row and (j−1)th column is input to the first input terminal of the selector in the i-th row and j-th column (1≦i≦M, 2≦j≦N+1), a predetermined value of 1 or 0 is input to the second input terminal of the selector in the i-th row and j-th column, and the j-th significant bit of the thermometer code is input to the control terminal of the selector in the i-th row and j-th column.
A priority encoder that encodes an (N+1)-bit thermometer code, where N indicates a natural number, the encoder comprising:
Dependencies are inferred from the claim text.
Drawings are temporarily unavailable. Open the PDF at USPTO
From the US filing history. Foreign family members aren’t listed.
About 2 years 7 months of term left · ends 20 May 2029 (estimated)
The present application is claiming priority of Japanese Patent Application No. 2008-088005, filed on Mar. 28, 2008, the content of which is incorporated herein by reference.
1. Field of the Invention
The present invention relates to a priority encoder for encoding thermometer codes.
Embodiments will now be described, by way of example only, with reference to the accompanying drawings which are meant to be exemplary, not limiting, and wherein like elements are numbered alike in several Figures, in which:
FIG. 1 shows the structure of a TDC where a Vernier delay circuit is used;
FIG. 2 shows the structure of a TDC comprising a priority encoder according to the first embodiment;
The invention will now be described based on preferred embodiments which do not intend to limit the scope of the present invention but exemplify the invention. All of the features and the combinations thereof described in the embodiment are not necessarily essential to the invention.
In the present specification, the state represented by the phrase “the member A is connected to the member B” includes a state in which the member A is indirectly connected to the member B via another member that does not affect the electric connection therebetween, in addition to a state in which the member A is physically and directly connected to the member B. In the same way, the state represented by the phrase “the member C is provided between the member A and the member B” includes a state in which the member A is indirectly connected to the member C, or the member B is indirectly connected to the member C via another member that does not affect the electric connection therebetween, in addition to a state in which the member A is directly connected to the member C, or the member B is directly connected to the member C.
FIG. 2 shows the structure of a TDC 300a comprising a priority encoder 100a according to the first embodiment. The TDC 300a is provided in test apparatuses like automatic test equipment (ATE), time interval analyzers, and jitter measuring devices. The TDC 300a comprises a Vernier delay circuit 200 and a priority encoder 100a. The Vernier delay circuit 200 receives a start signal Sstart and a stop signal Sstop and produces an (N+1)-bit thermometer code TC[0:N] where a change in the bits occurs at a position determined by a time difference. The structure of the Vernier delay circuit 200 is similar to that of FIG. 1 so that a detailed description will be omitted. The thermometer code TC[0] represents the most significant bit MSB, and TC[N] represents the (N+1)th significant bit, i.e., the least significant bit LSB.