DVD EFM modulation architecture using two passes to reduce circuit size

A system comprising:

• a primary modulator configured to generate (i) a primary frame by inserting a primary synchronization, code into a video input signal, (ii) a plurality of first values for said primary frame, (iii) a first digital sum value for said primary frame and (iv) a video output signal by modulating said video input signal using one set of (a) said first values and (b) a plurality of second values as determined by said first digital sum value relative to a second digital sum value;
• and
• a secondary modulator configured to generate (i) a secondary frame by inserting a secondary synchronization code into said video input signal, (ii) said second values for said secondary frame, (ii) said second digital sum value for said secondary frame.

A system comprising:

• means for error correction coding a video input signal;
• and
• means for generating (A) during a first modulation pass (i) a primary frame by inserting a plurality of primary synchronization codes into said video input signal, (ii) a secondary frame by inserting a plurality of secondary synchronization codes into said video input signal, (iii) a plurality of first values and a first digital sum value for said primary frame and (iv) a plurality of second values and a second digital sum value both for said secondary frame and (B) during a second modulation pass generating a video output signal by modulating said video input signal using one set of (i) said first values and (ii) said second values as determined by said first digital sum value relative to said second digital sum value.