Semiconductor integrated circuit device and testing method of the same
AssigneeFujitsu Limited
InventorKenji Ijitsu
Life of this patent
Estimating the term…
Abstract
A disclosed semiconductor integrated circuit device includes a logic circuit, a memory circuit to which data are written by the logic circuit and from which the data are read by the logic circuit, a register circuit holding the data when the logic circuit writes the data to the memory circuit, and a selector circuit selecting one of data output from the register circuit and data output from the memory circuit, and outputting the selected data to the logic circuit. Further in the semiconductor integrated circuit device, in an operational test of the logic circuit, the selector circuit selects the data output from the register circuit and outputs the selected data to the logic circuit.
Claims8
A semiconductor integrated circuit device comprising:
- a logic circuit;
- a memory circuit to which data are written by the logic circuit and from which the data are read by the logic circuit;
- a register circuit configured to hold the data when the logic circuit writes the data to the memory circuit;
- and
- a selector circuit configured to select one of data output from the register circuit and data output from the memory circuit, and output the selected data to the logic circuit, wherein
- in an operational test of the logic circuit, the selector circuit selects the data output from the register circuit and outputs the selected data to the logic circuit.
A method of testing a semiconductor integrated circuit device, the semiconductor integrated circuit device including:
- a logic circuit;
- a memory circuit to which data are written by the logic circuit and from which the data are read by the logic circuit;
- and
- a register circuit configured to hold the data when the logic circuit writes the data to the memory circuit, the method of testing the semiconductor integrated circuit device comprising:
- holding data to be used for the operational test in the register circuit;
- inputting the data to be used for the operational test held in the register circuit to the logic circuit;
- and
- testing operations of the register circuit by using the input data to be used for the operational test.
Dependencies are inferred from the claim text.