Architecture for local programming of quantum processor elements using latching qubits
AssigneeD-Wave Systems Inc.
InventorAndrew Joseph Berkley
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Abstract
An architecture for a quantum processor may include a set of superconducting flux qubits operated as computation qubits and a set of superconducting flux qubits operated as latching qubits. Latching qubits may include a first closed superconducting loop with serially coupled superconducting inductors, interrupted by a split junction loop with at least two Josephson junctions; and a clock signal input structure configured to couple clock signals to the split junction loop. Flux-based superconducting shift registers may be formed from latching qubits and sets of dummy latching qubits. The devices may include clock lines to clock signals to latch the latching qubits. Thus, latching qubits may be used to program and configure computation qubits in a quantum processor.
Claims18
A superconducting quantum processor comprising:
- a plurality of computation qubits, wherein each computation qubit comprises a qubit loop formed by a loop of superconducting material and a compound Josephson junction that interrupts the qubit loop, the compound Josephson junction comprising a closed loop of superconducting material interrupted by at least two Josephson junctions, wherein the qubit loop and the compound Josephson junction form a closed superconducting current path, and wherein each computation qubit is configured to perform at least a portion of a quantum computation;
- a plurality of latching qubits, wherein each latching qubit comprises a qubit loop formed by a loop of superconducting material and a compound Josephson junction that interrupts the qubit loop, the compound Josephson junction comprising a closed loop of superconducting material interrupted by at least two Josephson junctions, wherein the qubit loop and the compound Josephson junction form a closed superconducting current path, and wherein each latching qubit is inductively coupled to at least one of a computation qubit and another latching qubit;
- and
- a clock signal input structure configured to couple clock signals to the compound Josephson junction of at least one latching qubit, wherein the clock signal input structure includes at least one superconducting inductor positioned sufficiently proximate the compound Josephson junction of the at least one latching qubit to inductively couple clock signals thereto.
Dependencies are inferred from the claim text.