Semiconductor integrated circuit and method for inspecting same

A semiconductor integrated circuit comprising a first chip and a second chip, wherein

• the second chip has:
• a plurality of internal connection input pads;
• and
• a plurality of CMOS input circuits connected to the plurality of internal connection input pads, and
• the first chip has:
• a plurality of internal connection output pads electrically connected via bonding wires to the plurality of internal connection input pads, respectively;
• a plurality of CMOS output circuits connected to the plurality of internal connection output pads, respectively;
• and
• a test circuit for controlling, via the plurality of CMOS output circuits, output states of the internal connection output pads such that the output states of the plurality of internal connection output pads are each controlled to be in each of a high-impedance output state, a high-level output state and a low-level output state, so that a current flowing through a path from a power supply to a ground of the first chip or of the second chip is measured by an ammeter.