Wafer level integration package

A semiconductor package, comprising:

• a double-sided substrate having an active surface and second surface opposite the active surface;
• a conductive via formed from the active surface and extending through the double-sided substrate to the second surface;
• a first conductive layer formed over the active surface and electrically connected to the conductive via;
• a semiconductor component mounted to the active surface of the double-sided substrate and electrically connected to the first conductive layer and conductive via;
• an encapsulant deposited over the semiconductor component, over the double-sided substrate, and in a channel formed along a side of the double-sided substrate;
• a second conductive layer formed over the second surface and electrically connected to the conductive via;
• and
• a dielectric layer formed over the second surface surrounding and isolating the second conductive layer.

A semiconductor package, comprising:

• a substrate with a wafer-form factor having an active surface and second surface opposite the active surface;
• a conductive via formed between the active surface and second surface;
• a first conductive layer formed over the active surface and electrically connected to the conductive via;
• a semiconductor component mounted over the substrate and electrically connected to the first conductive layer and the conductive via;
• a channel extending from the active surface partially through the substrate;
• an encapsulant deposited over the substrate, semiconductor component, and into the channel wherein:
• the substrate is backgrinded to expose the encapsulant in the channel and the conductive via;
• and
• an interconnect structure formed over the second surface.

A semiconductor package, comprising:

• a substrate;
• a first conductive layer formed over a first surface of the substrate;
• a conductive via formed between the first conductive layer and a second surface of the substrate;
• a semiconductor component mounted to the substrate and electrically connected to the first conductive layer;
• and
• an encapsulant deposited over the semiconductor component and covering a side of the substrate from the first surface to the second surface of the substrate.