US 7,843,039 B2 · Stress-modified device structures, methods of fabricating such stress-modified device structures, and design structures for an integrated circuit

Abstract

Stress-modified device structures, methods of fabricating such stress-modified device structures, and design structures for an integrated circuit. An electrical characteristic of semiconductor devices formed on a common substrate, such as the current gains of bipolar junction transistors, may be altered by modifying stresses in structures indirectly on or over, or otherwise indirectly coupled with, the semiconductor devices. The structures, which may be liners for contacts in a contact level of an interconnect, are physically spaced away from, and not in direct physical contact with, the respective semiconductor devices because at least one additional intervening material or structure is situated between the stress-imparting structures and the stress-modified devices. The intervening materials or structures, such as contacts extending through an insulating layer of a local interconnect level between the contact level and the semiconductor devices, provide paths for the transfer of stress from the stress-imparting structures to the stress-modified semiconductor devices.

Claims16

Dependent claims

A device structure for use on a substrate, the device structure comprising:

a first semiconductor device formed using the substrate;
a second semiconductor device formed using the substrate, the second semiconductor device spaced apart on the substrate from the first semiconductor device;
an insulating layer over the first and second semiconductor devices;
a first contact extending through the insulating layer toward the portion of the first semiconductor device;
a first intervening structure between the first contact and the portion of the first semiconductor device;
a first stress-imparting structure indirectly coupled with a portion of the first semiconductor device, the first stress-imparting structure configured to impart a first stress to the first semiconductor device;
and
a second stress-imparting structure indirectly coupled with a portion of the second semiconductor device, the second stress-imparting structure configured to impart a second stress to the second semiconductor device that differs in magnitude from the first stress;
wherein the first stress-imparting structure is a first liner that is partially disposed between the first contact and the insulating layer and that is also partially disposed between the first contact and the portion of the first semiconductor device.

6 more elements

A device structure for use on a substrate, the device structure comprising:

a first semiconductor device formed using the substrate;
a second semiconductor device formed using the substrate, the second semiconductor device spaced apart on the substrate from the first semiconductor device;
an insulating layer directly on the first and second semiconductor devices;
a first contact extending through the insulating layer to establish a first electrical connection with the portion of the first semiconductor device;
a first stress-imparting structure indirectly coupled with a portion of the first semiconductor device, the first stress-imparting structure configured to impart a first stress to the first semiconductor device;
and
a second stress-imparting structure indirectly coupled with a portion of the second semiconductor device, the second stress-imparting structure configured to impart a second stress to the second semiconductor device that differs in magnitude from the first stress;
and
wherein the first contact transfers the first stress from the first stress-imparting structure to the portion of the first semiconductor device.

6 more elements

A device structure comprising:

a bipolar junction transistor including a first device collector region, a base region, and a second device an emitter region;
a first stress-imparting structure indirectly coupled with a first device region selected from the collector region, the base region, or the emitter region, the first stress-imparting structure configured to impart a first stress to the first device region of the bipolar junction transistor ;
and a second stress-imparting structure indirectly coupled with a second device region different from the first device region and selected from the collector region, the base region, or the emitter region of the bipolar junction transistor, the second stress-imparting structure configured to impart a second stress to the second device region that differs in magnitude from the first stress.

Dependencies are inferred from the claim text.

Stress-modified device structures, methods of fabricating such stress-modified device structures, and design structures for an integrated circuit

Life of this patent

Stress-modified device structures, methods of fabricating such stress-modified device structures, and design structures for an integrated circuit

Life of this patent

Abstract

Claims16