High level integration phase change memory device having an increased diode junction area and method for manufacturing the same

A phase change memory device comprising:

• a semiconductor substrate having an active region;
• a plurality of first conductivity type silicon pillars formed on the substrate, such that each first conductivity type silicon pillar is provided for two adjoining phase cells and is located at boundaries of the respective two adjoining phase cells;
• and
• a plurality of second conductivity type silicon patterns formed on the plurality of first conductivity type silicon pillars, such that two second conductivity type silicon patterns are formed on opposite sidewalls of each respective first conductivity type silicon pillars wherein the two adjoining phase cells together share only one first conductivity type silicon pillar and each adjoining phase cell is connected to only one second conductivity type silicon pattern which constitutes a PN diode in cooperation with the corresponding first conductivity type silicon pillar in which each PN diode serves as a single switching element for each corresponding phase cell.