Start-up control device
AssigneeRichtek Technology Corporation
InventorsChien-Hsing Cheng, Kuang-Ming Chang
Life of this patent
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Abstract
A transistor having a start-up control element is provided. The transistor includes an N-type depletion mode transistor and an N-type enhancement mode transistor. The N-type depletion mode transistor includes a drain for electrically connecting to an external power supply, and a gate normally grounded. The N-type enhancement mode transistor includes a drain electrically connected to the external power supply, and a gate electrically connected to a source of the depletion mode transistor.
Claims18
A start-up control device comprising:
- an N-type depletion mode transistor, including a drain for electrically connecting to an external power supply, and a gate normally grounded;
- and
- an N-type enhancement mode transistor, including a drain electrically connected to the external power supply, and a gate connected to a source of the depletion mode transistor, wherein the source of the N-type enhancement mode transistor is coupled to an external capacitor.
A start-up circuit, electrically connected between a power supply and a capacitor, the start-up circuit comprising:
- a depletion mode transistor normally in an ON state;
- and
- an enhancement mode transistor electrically connected with the depletion mode transistor partially in parallel, wherein drains of the enhancement mode transistor and the depletion mode transistor are coupled, and a source of the depletion mode transistor is coupled to a gate of the enhancement mode transistor, wherein the source of the enhancement mode transistor is coupled to the capacitor.
A semiconductor device comprising:
- a substrate of a first conductivity type;
- a first well of a second conductivity type located in the substrate;
- a second well of the first conductivity type located in the substrate, wherein the second well and the substrate are normally conductive to each other;
- a first gate of the first conductivity type, capable of cooperating with the first well to pinch-off the conduction between the second well and the substrate when the first gate is biased;
- a third well of the first conductivity type located in the substrate;
- a fourth well of the second conductivity type located in the substrate, the fourth well separating the third well and the substrate;
- and
- a second gate of the first conductivity type, capable of activating the conduction between the third well and the substrate when the second gate is biased.
Dependencies are inferred from the claim text.