US 7,842,605 B1Granted

Atomic layer profiling of diffusion barrier and metal seed layers

AssigneeNovellus Systems, Inc.

InventorsAnshu A. Pradhan, Robert Rozbicki

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Abstract

Material is removed from a substrate surface (e.g., from a bottom portion of a recessed feature on a partially fabricated semiconductor substrate) by subjecting the surface to a plurality of profiling cycles, wherein each profiling cycle includes a net etching operation and a net depositing operation. An etching operation removes a greater amount of material than is being deposited by a depositing operation, thereby resulting in a net material etch-back per profiling cycle. About 2-10 profiling cycles are performed. The profiling cycles are used for removing metal-containing materials, such as diffusion barrier materials, copper line materials, and metal seed materials by PVD deposition and resputter. Profiling with a plurality of cycles removes metal-containing materials without causing microtrenching in an exposed dielectric. Further, overhang is reduced at the openings of the recessed features and sidewall material coverage is improved. Integrated circuit devices having higher reliability are fabricated.

Claims37

Dependent claims

A method of processing a layer of material on a semiconductor substrate having a recessed feature, the method comprising:

(a) depositing a layer of a first diffusion barrier material on the semiconductor substrate, to coat at least a bottom portion of the recessed feature;
and
(b) performing a plurality of profiling cycles, wherein each profiling cycle comprises a net etching operation removing a first portion of a material residing at the bottom of the recessed feature and a net deposition operation depositing a second portion of the first diffusion barrier material at the bottom of the recessed feature, the removed portion of the material being greater than the deposited portion of the material for at least one of the profiling cycles, and wherein performing the plurality of profiling cycles achieves net material etching at the bottom portion of the recessed feature;
(c) depositing a layer of second diffusion barrier material on the semiconductor substrate, to coat at least the bottom portion of the recessed feature;
and
(d) performing a plurality of profiling cycles, wherein each profiling cycle comprises a net etch-back operation and a net deposition operation, wherein the net deposition operation comprises depositing the second diffusion barrier material.

3 more elements

Dependencies are inferred from the claim text.

Facts

Application: 11/807,179Filed 24 May 2007 · continuation in part
Priority: 11 Apr 2003
Granted: 30 Nov 2010
Term ends: Not estimatedThe source records don’t support an estimate.

Classification9 codes

H10P 14/44
Using a gas or vapour: physical vapour deposition [PVD]
C23C 14/046
Coating on selected surface areas, e.g. using masks: coating cavities or hollow spaces, e.g. interior of tubes; Infiltration of porous substrates
C23C 14/345
Applying energy to the substrate during sputtering: using substrate bias
H10W 20/033
Of conductive barrier, adhesion or liner layers: in openings in dielectrics

Family

Application10/412,562Parent of this continuation-in-part · filed 11 Apr 2003
Application10/804,353Parent of this continuation-in-part · filed 18 Mar 2004
US 6,764,940 B1Parent of this continuation-in-part · filed 20 Jul 2004
Application11/588,586Parent of this continuation-in-part · filed 26 Oct 2006
US 7,186,648 B1Parent of this continuation-in-part · filed 6 Mar 2007
US 7,781,327 B1Related patent
US 7,842,605 B1This patent

From the US filing history. Foreign family members aren’t listed.