Semiconductor device including first and second sidewalls and method of manufacturing semiconductor device
AssigneeNEC Electronics Corporation
InventorYoshitaka Kubota
Life of this patent
Estimating the term…
Loading patent…
AssigneeNEC Electronics Corporation
InventorYoshitaka Kubota
Estimating the term…
The invention provides a method of manufacturing a semiconductor device including a non-volatile memory with high yield, and a semiconductor device manufactured by the method. A method of manufacturing a semiconductor device includes a process of forming a second side wall such that the width of the second side wall, which is formed on the side of a portion of a second gate electrode that does not face dummy gates on a drain forming region side, in a gate length direction is larger than that of the second side wall, which is formed on the side of the second gate electrode on a source forming region side, in the gate length direction, in a non-volatile memory forming region.
A method of manufacturing a semiconductor device, comprising:
Dependencies are inferred from the claim text.
Drawings are temporarily unavailable. Open the PDF at USPTO
From the US filing history. Foreign family members aren’t listed.
Insulated-gate field-effect transistors [IGFET]: iGFETs having charge trapping gate insulators, e.g. MNOS transistors
EEPROM devices comprising charge-trapping gate insulators: characterised by the peripheral circuit region
Of FETs having insulated gates [IGFET]: of FETs having charge-trapping gate insulators, e.g. MNOS transistors
IGFETs having charge trapping gate insulators, e.g. MNOS transistors: characterised by the shapes, relative sizes or dispositions of the gate…
About 3 years of term left · ends 3 Nov 2029 (estimated)
1. Technical Field
The present invention relates to a semiconductor device including an FET and a non-volatile memory, and a method of manufacturing the semiconductor device.
2. Related Art
The above and other objects, advantages and features of the present invention will be more apparent from the following description of certain preferred embodiments taken in conjunction with the accompanying drawings, in which:
FIGS. 1A and 1B are diagrams schematically illustrating a method of manufacturing a semiconductor device according to a first embodiment of the invention;
FIGS. 2A and 2B are diagrams schematically illustrating the method of manufacturing the semiconductor device according to the first embodiment;
The invention will be now described herein with reference to illustrative embodiments. Those skilled in the art will recognize that many alternative embodiments can be accomplished using the teachings of the present invention and that the invention is not limited to the embodiments illustrated for explanatory purposed.
Hereinafter, exemplary embodiments of the invention will be described with reference to the accompanying drawings. In the drawings, the same components are denoted by the same reference numerals, and a description thereof will not be repeated.
A method of manufacturing a semiconductor device according to an embodiment of the invention includes the following processes.