Integrated circuit micro-module

A method of forming an integrated circuit package, comprising:

• providing a substrate having a first and an opposing second surface;
• applying a conductive material on the first surface of the substrate to form substrate bond pads;
• forming a plurality of microsystems on the first surface of the substrate, the formation of each microsystem further comprising:
• sequentially depositing layers of epoxy over the substrate to form a plurality of immediately adjacent stacked layers, wherein the epoxy layers are deposited by spin coating, there being a topmost epoxy layer;
• photolithographically patterning at least one of the epoxy layers after the at least one of the epoxy layers is deposited and before the next epoxy layer is deposited;
• forming openings in the at least one of the epoxy layers after the at least one of the epoxy layers is patterned and before the next epoxy layer is deposited;
• placing each one of a plurality of integrated circuits within an associated one of the openings, wherein each integrated circuit has a plurality of I/O bond pads and at least one of the epoxy layers is deposited after the placement of each integrated circuit to thereby cover the integrated circuit;
• and
• forming at least one conductive interconnect layer, wherein each interconnect layer is embedded in an associated epoxy layer;
• forming the interconnect layers of the plurality of microsystems such that at least one of the interconnect layers is electrically coupled with at least one of the substrate bond pads;
• applying molding material over the first surface of the wafer to form a molded wafer structure, thereby encapsulating each one of the plurality of microsystems;
• singulating the molded wafer structure to form individual integrated circuit packages, wherein each integrated circuit package includes at least one of the plurality of microsystems;
• and
• removing at least some of the substrate to expose the substrate bond pads.