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US 7,839,885 B2Granted
Connection memory for tributary time-space switches
AssigneeLSI Corporation
InventorsEphrem C. Wu, Wei-Je Huang
Life of this patent
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Abstract
A method of switching a plurality of tributaries disposed among a plurality of time slots in a frame is disclosed. The method generally includes the steps of (A) buffering the frame, (B) switching the tributaries among the time slots in response to a read address and (C) generating the read address in response to a plurality of identifications in a connection map, the connection map defining (i) at most one of the identifications for each of the tributaries and (ii) one of the identifications for each of the time slots carrying other than the tributaries.
Claims25
A method of switching a plurality of tributaries disposed among a plurality of time slots in a frame, comprising the steps of:
- (A) buffering said frame in a switch circuit;
- (B) switching said tributaries among said time slots in response to a read address;
- and
- (C) generating said read address in response to a plurality of identifications in a connection map, wherein (i) said identifications define data rearrangement among said time slots in said frame and (ii) said connection map has (a) a number of said identifications no greater than a maximum number of said tributaries in said frame plus one for a transport overhead of said frame and plus one for a path overhead of said frame and (b) less than 180QN┌ log290PN┐ bits, where P is a number of input ports of said switch circuit, Q is a number of output ports of said switch circuit and N is a number of either (1) SONET Synchronous Transport Signal, level-1 frames or (2) Synchronous Transport Module, level-0 frames in said frame.
1 more element
A system comprising:
- a switch circuit configured to (i) buffer a particular frame comprising a plurality of time slots carrying a plurality of tributaries and (ii) switch said tributaries among said time slots in response a read signal;
- and
- a memory circuit configured to generate said read signal in response to a plurality of identifications in a connection map stored therein, wherein (i) said identifications define data rearrangement among said time slots in said frame and (ii) said connection map has (a) a number of said identifications no greater than a maximum number of said tributaries in said particular frame plus one for a transport overhead of said particular frame and plus one for a path overhead of said particular frame and (b) less than 180QN┌ log290PN┐ bits, where P is a number of input ports of said switch circuit, Q is a number of output ports of said switch circuit and N is a number of either (1) SONET Synchronous Transport Signal, level-1 frames or (2) Synchronous Transport Module, level-0 frames in said particular frame.
A system comprising:
- means for buffering a plurality of tributaries disposed among a plurality of time slots in a frame;
- means for switching said tributaries among said time slots in response to a read address;
- and
- means for generating said read address in response to a plurality of identifications in a connection map, wherein (i) said identifications define data rearrangement among said time slots in said frame and (ii) said connection map has (a) a number of said identifications no greater than a maximum number of said tributaries in said frame plus one for a transport overhead of said frame and plus one for a path overhead of said frame and (b) less than 180QN┌ log290PN┐ bits, where P is a number of input ports of said means for buffering, Q is a number of output ports of said means for buffering and N is a number of either (1) SONET Synchronous Transport Signal, level-1 frames or (2) Synchronous Transport Module, level-0 frames in said frame.
1 more element
A system comprising:
- a switch circuit configured to (i) buffer a frame comprising a plurality of time slots carrying a plurality of tributaries and (ii) switch said tributaries among said time slots in response a read signal;
- and
- a memory circuit configured to generate said read signal in response to a plurality of identifications in a connection map stored therein, wherein said connection map has less than 180QN┌ log290PN┐ bits, where P is a number of input ports of said switch circuit, Q is a number of output ports of said switch circuit and N is a number of either (i) SONET Synchronous Transport Signal, level-1 frames or (ii) Synchronous Transport Module, level-0 frames in said frame.
A method of switching a plurality of tributaries disposed among a plurality of time slots in a frame, comprising the steps of:
- (A) buffering said frame in a switch circuit;
- (B) switching said tributaries among said time slots in response to a read address;
- and
- (C) generating said read address in response to a plurality of identifications in a connection map, wherein said connection map has less than 180QN┌ log290PN┐ bits, where P is a number of input ports of said switch circuit, Q is a number of output ports of said switch circuit and N is a number of either (i) SONET Synchronous Transport Signal, level-1 frames or (ii) Synchronous Transport Module, level-0 frames in said frame.
1 more element
Dependencies are inferred from the claim text.