Memory system including flash memory and method of operating the same

A method of operating a memory system, the memory system including a flash memory device having a plurality of memory blocks, said method comprising:

• copying read error information from the flash memory device into a buffer RAM at a power-up time;
• determining whether there is a memory block having a correctable read error based on the read error information of the buffer RAM;
• and
• replacing a memory block including the correctable read error with a spare memory block if the read error is caused by a read disturbance,
• wherein the read disturbance is caused by programming of a memory cell of a deselected word line during reading of a memory cell of a selected word line.

A memory system comprising:

• a flash memory device including a plurality of memory blocks;
• and
• a memory controller which operates the flash memory device, wherein the memory controller is configured to determine whether a read error generated during a read operation of the flash memory device is caused by a read disturbance, and replace a memory block which includes the read error with a spare memory block if the read error is caused by the read disturbance,
• wherein the read disturbance is caused by programming of a memory cell of a deselected word line during reading of a memory cell of a selected word line.

A memory system comprising:

• a flash memory device including a plurality of memory blocks;
• and
• a memory controller which operates the flash memory device, wherein the memory controller comprises a central processing unit, a buffer RAM which stores data read from the flash memory device under control of the central processing unit, and an error check and correction circuit which detects whether there is a read error in data transferred to the buffer RAM,
• wherein if there is a read error in the data transferred to the buffer RAM, the central processing unit determines whether the read error is caused by read disturbance based on a detection result of the error check and correction circuit, wherein, when the read error is detected as being caused by the read disturbance, the central processing unit stores read error information of a memory block including the read error into the buffer RAM,
• wherein the central processing unit is configured to control the flash memory device to replace the memory block including the read error with a spare memory block, based on the read error information of the buffer RAM, and
• wherein the read disturbance is caused by programming of a memory cell of a deselected word line during reading of a memory cell of a selected word line.