Display device
AssigneesHitachi Displays, Ltd., IPS Alpha Technology, Ltd.
InventorsKunihiko Watanabe, Junichi Uehara, Miyo Ishii
Life of this patent
Estimating the term…
Abstract
The present invention provides a display device which can obviate the occurrence of a leak current in a thin film transistor. In a display device including a substrate, and gate signal lines, an insulation film, semiconductor layers and conductor layers which are sequentially stacked on the substrate, the conductor layer forms at least a drain electrode which is connected to a drain signal line and a source electrode which is connected to a pixel electrode, and the semiconductor layer is formed in a pattern in which the semiconductor layer has a protruding portion which protrudes outwardly from the conductor layer at a portion thereof except for a distal end of the drain electrode as viewed in a plan view.
Claims7
A display device comprising a substrate, and a plurality of gate signal line, a plurality of semiconductor layer and a plurality of conductor layer which are sequentially stacked on the substrate, wherein
- the conductor layer forms at least a drain electrode which is connected to a drain signal line and a source electrode which is connected to a pixel electrode,
- the source electrode is formed in a pattern in which the source electrode has a projecting portion at a position where the source electrode overlaps the gate signal line as viewed in a plan view, and
- the semiconductor layer is formed in a pattern in which the semiconductor layer has a protruding portion which protrudes outwardly from the conductor layer at a portion thereof except for a distal end of the projecting portion as viewed in a plan view.
A display device comprising a substrate, and a plurality of gate signal line, a plurality of semiconductor layer and a plurality of conductor layer which are sequentially stacked on the substrate, wherein
- the conductor layer forms at least a drain electrode which is connected to a drain signal line and a source electrode which is connected to a pixel electrode,
- the source electrode is formed in a pattern in which the source electrode has a projecting portion at a position where the source electrode overlaps the gate signal line as viewed in a plan view,
- the drain electrode is formed in a pattern in which the drain electrode has a projecting portion at a portion thereof close to a distal end thereof as viewed in a plan view, and
- the semiconductor layer is formed in a pattern in which the semiconductor layer has a protruding portion which protrudes outwardly from the conductor layer at a portion thereof except for a distal end of the projecting portion of the source electrode and a distal end of the projecting portion of the drain electrode as viewed in a plan view.
Dependencies are inferred from the claim text.