MCU with integrated voltage isolator and integrated galvanically isolated asynchronous serial data link

An integrated circuit, comprising:

• first and second semiconductor die disposed in a package and galvanically isolated;
• a galvanic isolation data link disposed between the first and second die;
• a first microcontroller unit disposed on the first die for executing instructions in accordance with a first clock frequency generated on the first die, the first microcontroller unit including a first processing core for providing parallel data to be transmitted across the isolation link to the second die, and the parallel data generated and processed in accordance with the first clock frequency;
• a second microcontroller unit disposed on the second die for executing instructions in accordance with substantially the first clock frequency, the second microcontroller unit including a second processing core for processing parallel data received across the isolation link from the first die, and the received parallel data processed in accordance with substantially the first clock frequency;
• the galvanic isolation link including capacitive isolation circuitry connected with the first microcontroller unit and the second microcontroller unit for providing a high voltage isolation link between the first and the second microcontroller units, the capacitive isolation circuitry distributing a first portion of a high voltage isolation signal across a first group of capacitors associated with the first microcontroller unit and distributing a second portion of the high voltage isolation signal across a second group of capacitors associated with the second microcontroller unit, the capacitive isolation circuitry further transmitting data from the parallel data stream between the first microcontroller unit and the second microcontroller unit in a serial data stream in accordance with respective isolation clock frequencies on each side of the isolation link;
• and
• wherein the clock frequencies on either side of the isolation link operate asynchronous.

An integrated circuit, comprising:

• a first microcontroller unit for executing instructions in accordance with a first clock frequency located on a first die including a first processing core for providing a parallel stream of data in accordance with the first clock frequency;
• first transceiver circuitry located on the first die for converting between the parallel data stream and the serial data stream in accordance with a second clock frequency that is faster than the first clock frequency;
• a second microcontroller unit for executing instructions in accordance with the first clock frequency located on a second die including a second processing core for receiving the parallel stream of data in accordance with the first clock frequency;
• second transceiver circuitry located on the second die for converting between the serial data stream and the parallel data stream in accordance with the second clock frequency;
• capacitive isolation circuitry for bidirectionally transmitting data from the parallel data stream between the first microcontroller unit and the second microcontroller unit in a serial data stream in accordance with the second clock frequency and providing galvonic isolation between the first microcontroller unit and the second microcontroller unit.