Fabrication of single or multiple gate field plates
AssigneeThe Regents of the University of California
InventorsAlessandro Chini, Umesh K. Mishra, Primit Parikh, Yifeng Wu
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AssigneeThe Regents of the University of California
InventorsAlessandro Chini, Umesh K. Mishra, Primit Parikh, Yifeng Wu
Estimating the term…
A process for fabricating single or multiple gate field plates using consecutive steps of dielectric material deposition/growth, dielectric material etch and metal evaporation on the surface of a field effect transistors. This fabrication process permits a tight control on the field plate operation since dielectric material deposition/growth is typically a well controllable process. Moreover, the dielectric material deposited on the device surface does not need to be removed from the device intrinsic regions: this essentially enables the realization of field-plated devices without the need of low-damage dielectric material dry/wet etches. Using multiple gate field plates also reduces gate resistance by multiple connections, thus improving performances of large periphery and/or sub-micron gate devices.
A high electron mobility transistor (HEMT), comprising:
Dependencies are inferred from the claim text.