Partial packet write and write data filtering in a multi-queue first-in first-out memory system
AssigneeIntegrated Device Technology, Inc.
InventorsMario Au, Jason Z. Mo, Hui Su
Life of this patent
Estimating the term…
Abstract
A multi-queue memory system is configured to operate in a packet mode. Each packet includes a SOP (start of packet) marker and an EOP (end of packet) marker. A packet status bit (PSB), is used to implement the packet mode. The packet status bit enables partial packet write and partial packet read operations, such that a queue switch can be performed in the middle of packet write or packet read operations. The packet status bit also enables data filtering to be performed between an activated EOP marker and a subsequently received SOP marker (i.e., between the end of one packet and the start of the next packet). Packet mark and re-write and packet mark and re-read operations are also enabled.
Claims5
A method of operating a multi-queue device, comprising:
- initiating a write operation to a first queue;
- detecting a start-of-packet indicator in write data associated with the write operation, and in response, setting a write packet status bit to a first state and writing data to the first queue;
- then
- interrupting the write operation;
- then
- resuming the write operation;
- detecting that the write packet status bit is in the first state upon resuming the write operation, and in response, writing data to the first queue;
- and
- preventing data from being written to the first queue while the write packet status bit is not in the first state.
A method of operating a multi-queue device, comprising:
- initiating a write operation to a first queue, wherein the step of initiating a write operation to the first queue comprises retrieving a write packet status bit from a register;
- detecting a start-of-packet indicator in write data associated with the write operation, and in response, setting the write packet status bit to a first state and writing data to the first queue;
- then
- interrupting the write operation, wherein the step of interrupting the write operation comprises returning the write packet status bit to the register;
- then
- resuming the write operation, wherein the step of resuming the write operation comprises retrieving the write packet status bit from the register;
- and
- detecting that the write packet status bit is in the first state upon resuming the write operation, and in response, writing data to the first queue.
Dependencies are inferred from the claim text.