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US 7,804,725 B2Granted
Write driving circuit and semiconductor memory apparatus using the same
AssigneeHynix Semiconductor Inc.
InventorsJee Eun Lee, Mun Phil Park
Life of this patent
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Abstract
A write driving circuit includes a plurality of driving units that write data corresponding to detection signals on memory banks, and at least one detecting unit that detects data input from the outside, and outputs the detection signals to two or more driving units among the plurality of driving units.
Claims23
A write driving circuit comprising:
- a plurality of driving units configured to write data corresponding to detection signals on memory banks;
- and
- at least one detecting unit coupled with the plurality of driving units, the detecting unit configured to detect data input from the outside, and output the detection signals to two or more driving units among the plurality of driving units,
- wherein the detecting unit includes:
- a sensor configured to detect the transition of the data and output the detection signal corresponding to the detected result;
- and
- a sensor controller configured to determine whether the plurality of memory banks are activated, and control the sensor to be operated on the basis of the result of the determination.
4 more elements
A semiconductor memory apparatus comprising:
- a plurality of memory banks;
- a detecting-unit-sharing write driving circuit coupled with the plurality of memory banks, the detecting-unit-sharing write driving circuit including:
- a plurality of driving units that are provided in each memory bank, and that are configured to write data on the corresponding memory bank using detection signals when the corresponding memory bank is activated, the number of driving units provided in each memory bank being equal to the number of bits of data written according to one write command, and
- detecting units that are configured to detect the data when any one of the plurality of memory banks is activated, and output the detection signals to the plurality of driving units;
- and
- a plurality of data lines through which the data is transmitted from the detecting-unit-sharing write driving circuit to the plurality of memory banks,
- wherein the detecting unit includes:
- a sensor configured to detect the transition of the data and output the detection signal corresponding to the detected result;
- and
- a sensor controller configured to determine whether the plurality of memory banks are activated, and control the sensor to be operated on the basis of the result of the determination.
7 more elements
A semiconductor memory apparatus comprising:
- N memory banks each having cells for data recording;
- and
- a write driving circuit configured to write data on the N memory banks, wherein the write driving circuit includes:
- a plurality of driving units that are provided in each of the N memory bank, and that are configured to determine whether the corresponding memory bank is activated on the basis of first control signals, and to write the data on the corresponding memory bank according to detection signals, the number of driving units provided in each memory bank being equal to the number of bits of the data written according to one write command, and
- detecting units configured to determine whether the N memory banks are activated on the basis of second control signals, and output the detection signals, and wherein a detecting unit is provided for every N driving units among the plurality of driving units,
- wherein the detecting unit includes:
- a sensor configured to detect the transition of the data and output the detection signal corresponding to the detected result;
- and
- a sensor controller configured to determine whether the plurality of memory banks are activated and control the sensor to be operated on the basis of the result of the determination.
6 more elements
Dependencies are inferred from the claim text.