Multi-level anti-fuse and methods of operating and fabricating the same
AssigneeSamsung Electronics Co., Ltd.
InventorsJunghun Sung, Sangmoo Choi, Deokkee Kim, Soojung Hwang
Life of this patent
Estimating the term…
Loading patent…
AssigneeSamsung Electronics Co., Ltd.
InventorsJunghun Sung, Sangmoo Choi, Deokkee Kim, Soojung Hwang
Estimating the term…
Provided may be a multi-level anti-fuse and methods of fabricating and operating the same. The multi-level anti-fuse may include at least three anti-fuses having a plurality of anti-fuses connected in parallel constituting a parallel connection structure and at least one anti-fuse connected to the parallel connection structure in series, wherein the parallel connection structure may have a smaller resistance than the resistance of the anti-fuse connected in series, the plurality of anti-fuses connected in parallel may include dielectric layers having different thicknesses from one another, and the breakdown voltages of each dielectric layer may be different from one another.
A multi-level anti-fuse comprising:
A method of operating the multi-level anti-fuse comprising:
A method of fabricating a multi-level anti-fuse comprising:
Dependencies are inferred from the claim text.
Drawings are temporarily unavailable. Open the PDF at USPTO
From the US filing history. Foreign family members aren’t listed.
Using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency: read-only digital stores…
In which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of…
Read-only memory [rom] devices
Programmable ROM [PROM] devices comprising field-effect components: one-time programmable ROM [OTPROM] devices, e.g. using electrically-fusible links
About 2 years 5 months of term left · ends 2 Apr 2029 (estimated)
This application claims priority under 35 U.S.C. §119 to Korean Patent Application No. 10-2008-0030859, filed on Apr. 2, 2008, in the Korean Intellectual Property Office (KIPO), the entire contents of which are incorporated herein by reference.
1. Field
Example embodiments relate to an anti-fuse and methods of operating and fabricating the same, and more particularly, to a multi-level anti-fuse that may perform a multi-level program operation and methods of operating and fabricating the same.
Example embodiments will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings. FIGS. 1-5 represent non-limiting, example embodiments as described herein
FIG. 1 is a graph showing a change in breakdown voltage characteristics according to the thickness of an oxide layer;
FIG. 2 is a diagram illustrating an equivalent circuit of the structure of a multi-level anti-fuse according to example embodiments;
It should be noted that these Figures are intended to illustrate the general characteristics of methods, structure and/or materials utilized in certain example embodiments and to supplement the written description provided below. These drawings are not, however, to scale and may not precisely reflect the precise structural or performance characteristics of any given embodiment, and should not be interpreted as defining or limiting the range of values or properties encompassed by example embodiments. For example, the relative thicknesses and positioning of molecules, layers, regions and/or structural elements may be reduced or exaggerated for clarity. The use of similar or identical reference numbers in the various drawings is intended to indicate the presence of a similar or identical element or feature.
Example embodiments will be described more fully hereinafter with reference to the accompanying drawings, in which example embodiments are shown. Example embodiments may, however, be embodied in different forms and should not be construed as limited to example embodiments set forth herein. Rather, example embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of example embodiments to those skilled in the art. In the drawings, the thickness of layers and regions are exaggerated for clarity. In addition, when a layer is described to be formed on another layer or on a substrate, this means that the layer may be formed on the other layer or on the substrate, or a third layer may be interposed between the layer and the other layer or the substrate. Like numbers refer to like elements throughout the specification.
It will be understood that when an element is referred to as being “connected” or “coupled” to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being “directly connected” or “directly coupled” to another element, there are no intervening elements present. Like numbers indicate like elements throughout. As used herein the term “and/or” includes any and all combinations of one or more of the associated listed items.