Level shifters
AssigneeMediatek Inc.
InventorsChe Yuan Jao, Yuan-Chin Liu
Life of this patent
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Abstract
Level shifters capable of setting logic level of the output signals thereof to a pre-defined known state during power-up are provided, in which a first logic unit is powered by a first power voltage, receives input signals with a core power voltage and comprises first and second output terminals. First and second drivers are coupled between the first output terminal and the first power voltage and between the second output terminal and the second power voltage respectively. When one of the first and second power voltages is not ready during power-up, the first driver matches a voltage level on the first output terminal with the first power voltage by AC coupling and the second driver pulls low or maintains a voltage level on the second output terminal.
Claims19
An I/O buffer, comprising:
- a plurality of the level shifters, each comprising:
- a first logic unit powered by an input/output (I/O) power voltage, the first logic unit receiving input signals with a core power voltage, the first logic unit comprising first and second output terminals;
- and
- a first driver coupled to the first output terminal, matching a voltage level on the first output terminal with the I/O power voltage by AC coupling when the core power voltage is not ready during power-up;
- and
- a plurality of driving units coupled between the level shifters and a pad, the driving units selectively setting a logic state of the pad to one of N predetermined logic states according to the voltages on the first or second output terminal of the level shifters during power-up, wherein N predetermined logic states comprise a strong “1” state, a strong “0” state, a weak “1” state, a weak “0” state and a high impedance state, and the driving units comprise:
- a pull-up driver coupled between the I/O power voltage and the pad, the pull-up driver setting the logic state of the pad to the strong “1” state when turning on;
- a pull-down driver coupled between the pad and a ground voltage, the pull-down driver setting the logic state of the pad to the strong “0” state when turning on;
- a weak pull-up resistor coupled between the pad and the I/O power voltage, the weak pull-up resistor setting the logic state of the pad to the weak “1” state when turning on;
- and
- a weak pull-down resistor coupled between the pad and the ground voltage, the weak pull-down resistor setting the logic state of the pad to the weak “0” state when turning on, wherein when the pull-up driver, the pull-down driver, the weak pull-up resistor and the weak pull-down resistor are turned off, the logic state of the pad is set at the high impedance state.
A level shifter, comprising:
- a first logic unit powered by an input/output (I/O) power voltage, the first logic unit receiving input signals with a core power voltage, the first logic unit comprising first and second output terminals;
- a first driver coupled to the first output terminal, matching a voltage level on the first output terminal with the I/O power voltage by AC coupling when the core power voltage is not ready during power-up, wherein the first driver comprises:
- a capacitor coupled between the first output terminal and the I/O power voltage;
- a diode comprising a first terminal connected to a ground voltage:
- and
- a transistor coupled between the diode and the first output terminal and comprising a control terminal coupled to the I/O power voltage;
- and
- a second driver coupled to the second output terminal, pulling a voltage level on the second output terminal to a ground voltage by a control signal from an external circuit.
A level shifter, comprising:
- a first logic unit powered by an input/output (I/O) power voltage, the first logic unit receiving input signals with a core power voltage, the first logic unit comprising first and second output terminals;
- a first driver coupled to the first output terminal, matching a voltage level on the first output terminal with the I/O power voltage by AC coupling when the core power voltage is not ready during power-up, wherein the first driver comprises a capacitor coupled between the first output terminal and the I/O power voltage;
- and
- a second driver coupled to the second output terminal, pulling a voltage level on the second output terminal to a ground voltage, wherein the second driver comprises:
- a first transistor comprising a first terminal coupled to the second output terminal, a second terminal coupled to the ground voltage, and a control terminal coupled to the first output terminal, wherein the second driver is controlled by the first driver.
A circuit, comprising:
- a plurality of I/O buffers, each comprising:
- at least one level shifter for generating an initial state signal when the core power voltage is not ready during power-up;
- and
- at least one driving unit coupled between the level shifter and a pad, the at least one driving unit comprising one of a pull-up driver, a pull-down driver, a weak pull-up resistor and a weak pull-down resistor to set a logic state of the pad to a predetermined logic state according to the voltages on the first or second output terminal of the level shifter during power-up,
- wherein the pull-up driver is coupled between the I/O power voltage and the pad to set the logic state of the pad to the strong “1” state when turning on, a pull-down driver is coupled between the pad and a ground voltage to set the logic state of the pad to the strong “0” state when turning on;
- a weak pull-up resistor is coupled between the pad and the I/O power voltage to set the logic state of the pad to the weak “1” state when turning on;
- and a weak pull-down resistor is coupled between the pad and the ground voltage to set the logic state of the pad to the weak “0” state when turning on.
Dependencies are inferred from the claim text.