Impedance matching circuit and semiconductor memory device with the same

A semiconductor memory device capable of testing the ZQ calibration of an impedance matching circuit without connecting an external resistor, comprising:

• a test resistance unit for supplying a ground voltage to a first node and having resistance determined according to a test calibration code;
• a first pull-up resistance unit for supplying a supply voltage to the first node and for calibrating its resistance to that of the test resistance unit in response to a pull-up calibration code;
• a second pull-up resistance unit for supplying the supply voltage to a second node in response to the pull-up calibration code;
• and
• a pull-down resistance unit for supplying the ground voltage to the second node for calibrating its resistance to that of the second pull-up resistance unit in response to a pull-down calibration code, wherein the first and second nodes are different nodes.

A method for testing a ZQ calibration of an impedance matching circuit without connecting an external resistor, comprising:

• determining resistance of a test resistance unit by inputting a test calibration code;
• generating a pull-up calibration code by supplying a first node with a supply voltage and calibrating resistance of a first pull-up resistance unit to that of the test resistance unit;
• inputting the pull-up calibration code to a second pull-up resistance unit;
• generating a pull-down calibration code by supplying a second node with a ground voltage and calibrating resistance of a pull-down resistance unit to that of the second pull-up resistance unit;
• and
• outputting the pull-down calibration code, wherein the first and second nodes are different nodes.