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US 7,804,142 B2Granted
Semiconductor device and fabrication method thereof
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsShunpei Yamazaki, Hideomi Suzawa, Koji Ono, Yoshihiro Kusuyama
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Abstract
For forming a gate electrode, a conductive film with low resistance including Al or a material containing Al as its main component and a conductive film with low contact resistance for preventing diffusion of Al into a semiconductor layer are laminated, and the gate electrode is fabricated by using an apparatus which is capable of performing etching treatment at high speed.
Claims8
A semiconductor device comprising:
- a pixel portion;
- and
- an external input terminal portion,
- wherein the pixel portion comprises:
- a semiconductor layer over an insulating surface;
- a gate insulating film on the semiconductor layer;
- and
- a gate electrode on the gate insulating film,
- wherein the semiconductor layer comprises a channel formation region, at least one LDD region in contact with the channel formation region, and a source region or a drain region in contact with the LDD region,
- wherein the gate electrode has a taper shape,
- wherein the gate electrode comprises a laminate of a fourth electrode, a fifth electrode and a sixth electrode, and at least one of the fourth electrode, the fifth electrode and the sixth electrode comprises copper, and
- wherein the external input terminal portion has a first portion and a second portion over the gate insulating film, the first portion including a conductive film comprising the fourth electrode, the fifth electrode and the sixth electrode, and the second portion including an interlayer insulating film, and
- wherein the first portion and the second portion are arranged alternately over the gate insulating film.
10 more elements
A semiconductor device comprising:
- a pixel portion;
- and
- an external input terminal portion,
- wherein the pixel portion comprises:
- a semiconductor layer over an insulating surface;
- a gate insulating film on the semiconductor layer;
- and
- a gate electrode on the gate insulating film,
- wherein the semiconductor layer comprises a channel formation region, at least one LDD region in contact with the channel formation region, and one of a source region and a drain region in contact with the LDD region,
- wherein the LDD region comprises an impurity region for giving one conductivity at a concentration of 1×1017 to 1×1020 atoms/cm3, and one of the source region and the drain region comprises the impurity element at a concentration of 1×1020 to 1×1021 atoms/cm3,
- wherein the gate electrode has a taper shape,
- wherein the gate electrode comprises a laminate of a fourth electrode, a fifth electrode and a sixth electrode, and at least one of the fourth electrode, the fifth electrode and the sixth electrode comprises copper, and
- wherein the external input terminal portion has a first portion and a second portion over the gate insulating film, the first portion including a conductive film comprising the fourth electrode, the fifth electrode the sixth electrode and the second portion including the gate insulating film and an interlayer insulating film, the first portion and the second portion arranged alternately over the gate insulating film.
10 more elements
Dependencies are inferred from the claim text.